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Message-ID: <20180528072034.GB3143@dragon>
Date: Mon, 28 May 2018 15:20:35 +0800
From: Shawn Guo <shawnguo@...nel.org>
To: Sebastian Reichel <sebastian.reichel@...labora.co.uk>
Cc: Sascha Hauer <kernel@...gutronix.de>,
Fabio Estevam <fabio.estevam@....com>,
Will Deacon <will.deacon@....com>,
Mark Rutland <mark.rutland@....com>,
Russell King <linux@...linux.org.uk>, Ian Ray <ian.ray@...com>,
Nandor Han <nandor.han@...com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
kernel@...labora.com
Subject: Re: [PATCHv4 1/2] ARM: imx53: add secure-reg-access support for PMU
On Mon, May 28, 2018 at 08:41:31AM +0200, Sebastian Reichel wrote:
> > Are you saying this is a very specific setup required by i.MX53 only?
>
> Yes, all other SoCs supported by Linux ARM PMU counters driver can
> just use the registers without having to enable platform specific
> bits first.
>
> > In that case, I can live with it.
>
> What about the DT node? I did not add it, since this is a i.MX53
> specific workaround anyways.
What you are adding here is secure-reg-access property, which has an
defined meaning in PMU binding doc. I'm not really sure if it's
appropriate to use the property as a condition for DBGEN bit setup.
Or can we set up the bit regardless of the property?
Shawn
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