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Message-Id: <20180528100327.840413630@linuxfoundation.org>
Date: Mon, 28 May 2018 11:59:32 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org, Tom St Denis <tom.stdenis@....com>,
Alex Deucher <alexander.deucher@....com>,
Sasha Levin <alexander.levin@...rosoft.com>
Subject: [PATCH 4.14 187/496] drm/amd/amdgpu: Correct VRAM width for APUs with GMC9
4.14-stable review patch. If anyone has any objections, please let me know.
------------------
From: Tom St Denis <tom.stdenis@....com>
[ Upstream commit 585b7f161c85bd5ca675b97580faf21c506541e3 ]
DDR4 has a 64-bit width not 128-bits. It was reporting
twice the width. Tested with my Ryzen 2400G.
Signed-off-by: Tom St Denis <tom.stdenis@....com>
Reviewed-by: Alex Deucher <alexander.deucher@....com>
Signed-off-by: Alex Deucher <alexander.deucher@....com>
Signed-off-by: Sasha Levin <alexander.levin@...rosoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -456,7 +456,10 @@ static int gmc_v9_0_mc_init(struct amdgp
adev->mc.vram_width = amdgpu_atomfirmware_get_vram_width(adev);
if (!adev->mc.vram_width) {
/* hbm memory channel size */
- chansize = 128;
+ if (adev->flags & AMD_IS_APU)
+ chansize = 64;
+ else
+ chansize = 128;
tmp = RREG32_SOC15(DF, 0, mmDF_CS_AON0_DramBaseAddress0);
tmp &= DF_CS_AON0_DramBaseAddress0__IntLvNumChan_MASK;
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