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Message-Id: <cover.1527621510.git.leonard.crestez@nxp.com>
Date:   Tue, 29 May 2018 22:39:15 +0300
From:   Leonard Crestez <leonard.crestez@....com>
To:     Andrey Smirnov <andrew.smirnov@...il.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Lucas Stach <l.stach@...gutronix.de>,
        Richard Zhu <hongxing.zhu@....com>, linux-pci@...r.kernel.org,
        linux-pm@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Cc:     Bjorn Helgaas <bhelgaas@...gle.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Anson Huang <Anson.Huang@....com>,
        Jingoo Han <jingoohan1@...il.com>,
        Joao Pinto <Joao.Pinto@...opsys.com>,
        "Rafael J. Wysocki" <rjw@...ysocki.net>,
        Abel Vesa <abel.vesa@....com>
Subject: [PATCH 0/2] PCI: Initial imx7d pm support

This series adds initial pm support on imx7d so that after
suspend/resume lspci works again. This mostly copies the resume sequence
from the imx tree.

More can be done later to reduce power in suspend as well as adding
support for other socs.

This is motivated mostly by a desire to bring imx PM code closer to
upstream. It is possible that I am missing some things about how PM
should be done for pci host drivers, it would be great if you could
point me the right way.

It also relies on this bugfix for PGC offsets:
    https://lkml.org/lkml/2018/5/29/138
Without that patch resume hangs on first PCI read from PCI-PM core. It
is not strictly related to PCI but pci-imx6 is the only user of gpcv2
power domains.

Patch 1 in this series is also technically an unrelated bugfix, however
pci-imx6 is the only user.

Leonard Crestez (2):
  reset: imx7: Fix always writing bits as 0
  PCI: imx: Initial imx7d pm support

 drivers/pci/dwc/pci-imx6.c | 94 ++++++++++++++++++++++++++++++++++++--
 drivers/reset/reset-imx7.c |  2 +-
 2 files changed, 90 insertions(+), 6 deletions(-)

-- 
2.17.0

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