[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20180529171555.19dd723f@bbrezillon>
Date: Tue, 29 May 2018 17:15:55 +0200
From: Boris Brezillon <boris.brezillon@...tlin.com>
To: Eugen Hristev <eugen.hristev@...rochip.com>
Cc: Peter Rosin <peda@...ntia.se>,
Tudor Ambarus <tudor.ambarus@...rochip.com>,
Nicolas Ferre <nicolas.ferre@...rochip.com>,
Ludovic Desroches <ludovic.desroches@...rochip.com>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Marek Vasut <marek.vasut@...il.com>,
Josh Wu <rainyfeeling@...look.com>,
Cyrille Pitchen <cyrille.pitchen@...ev4u.fr>,
<linux-kernel@...r.kernel.org>, <linux-mtd@...ts.infradead.org>,
Richard Weinberger <richard@....at>,
Brian Norris <computersforpeace@...il.com>,
David Woodhouse <dwmw2@...radead.org>,
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH] mtd: nand: raw: atmel: add module param to avoid using
dma
On Tue, 29 May 2018 18:01:40 +0300
Eugen Hristev <eugen.hristev@...rochip.com> wrote:
> [...]
>
>
> >
> > I think you're missing something here. We use the DMA engine in memcpy
> > mode (SRAM -> DRAM), not in device mode (dev -> DRAM or DRAM -> dev).
> > So there's no dmas prop defined in the DT and there should not be.
> >
> > Regards,
> >
> > Boris
> >
>
> Ok, so the memcpy SRAM <-> DRAM will hog the transfer between DRAM and
> LCD if my understanding is correct. That's the DMA that Peter wants to
> disable with his patch ?
>
> Then we can then try to force NFC SRAM DMA channels to use just DDR port
> 1 or 2 for memcpy ?
You mean the dmaengine? According to "14.1.3 Master to Slave Access"
that's already the case.
Only DMAC0 can access the NFC SRAM and it's done through DMAC0:IF0,
then access to DDR is going through port DDR port 1 (DMAC0:IF1) or 2
(DMAC0:IF0).
>
> I have also received a suggestion to try to increase the porches in
> LCDC_LCDCFG3 .
Yep, Nicolas suggested something similar. Peter, can you try that?
Powered by blists - more mailing lists