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Message-Id: <36c4dbe3-9fe5-42fe-dd5b-88b43005a2b8@au1.ibm.com>
Date: Thu, 31 May 2018 14:19:09 +1000
From: Andrew Donnellan <andrew.donnellan@....ibm.com>
To: "Alastair D'Silva" <alastair@....ibm.com>,
linuxppc-dev@...ts.ozlabs.org
Cc: linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org,
mikey@...ling.org, vaibhav@...ux.vnet.ibm.com,
aneesh.kumar@...ux.vnet.ibm.com, malat@...ian.org,
felix@...ux.vnet.ibm.com, pombredanne@...b.com,
sukadev@...ux.vnet.ibm.com, npiggin@...il.com,
gregkh@...uxfoundation.org, arnd@...db.de,
fbarrat@...ux.vnet.ibm.com, corbet@....net,
"Alastair D'Silva" <alastair@...ilva.org>
Subject: Re: [PATCH v5 1/7] powerpc: Add TIDR CPU feature for POWER9
On 11/05/18 16:12, Alastair D'Silva wrote:
> From: Alastair D'Silva <alastair@...ilva.org>
>
> This patch adds a CPU feature bit to show whether the CPU has
> the TIDR register available, enabling as_notify/wait in userspace.
>
> Signed-off-by: Alastair D'Silva <alastair@...ilva.org>
Reviewed-by: Andrew Donnellan <andrew.donnellan@....ibm.com>
--
Andrew Donnellan OzLabs, ADL Canberra
andrew.donnellan@....ibm.com IBM Australia Limited
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