linux-kernel - Re: [PATCH 4.16 269/272] pinctrl: msm: Use dynamic GPIO numbering

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Message-ID: <7c34ccef-2fa8-8b53-2677-29f6fbe71a04@dd-wrt.com>
Date:   Thu, 31 May 2018 13:21:56 +0200
From:   Sebastian Gottschall <s.gottschall@...wrt.com>
To:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        linux-kernel@...r.kernel.org
Cc:     stable@...r.kernel.org, Timur Tabi <timur@...eaurora.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Sasha Levin <alexander.levin@...rosoft.com>
Subject: Re: [PATCH 4.16 269/272] pinctrl: msm: Use dynamic GPIO numbering

Am 28.05.2018 um 12:05 schrieb Greg Kroah-Hartman:
> 4.16-stable review patch.  If anyone has any objections, please let me know.
>
> ------------------
>
> From: Bjorn Andersson <bjorn.andersson@...aro.org>
>
> [ Upstream commit a7aa75a2a7dba32594291a71c3704000a2fd7089 ]
>
> The base of the TLMM gpiochip should not be statically defined as 0, fix
> this to not artificially restrict the existence of multiple pinctrl-msm
> devices.
>
> Fixes: f365be092572 ("pinctrl: Add Qualcomm TLMM driver")
> Reported-by: Timur Tabi <timur@...eaurora.org>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org>
> Signed-off-by: Linus Walleij <linus.walleij@...aro.org>
> Signed-off-by: Sasha Levin <alexander.levin@...rosoft.com>
> Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
> ---
>   drivers/pinctrl/qcom/pinctrl-msm.c |    2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> --- a/drivers/pinctrl/qcom/pinctrl-msm.c
> +++ b/drivers/pinctrl/qcom/pinctrl-msm.c
> @@ -818,7 +818,7 @@ static int msm_gpio_init(struct msm_pinc
>   		return -EINVAL;
>   
>   	chip = &pctrl->chip;
> -	chip->base = 0;
> +	chip->base = -1;
>   	chip->ngpio = ngpio;
>   	chip->label = dev_name(pctrl->dev);
>   	chip->parent = pctrl->dev;

this patch creates a regression for me. on ipq8064 the systems gpios now 
start somewhere in the sky

new layout

lrwxrwxrwx    1 root     root             0 Jan  1 00:00 gpiochip373 -> 
../../devices/platform/soc/1b700000.pci/pci0001:00/0001:00:00.0/0001:01:00.0/gpio/gpiochip373
lrwxrwxrwx    1 root     root             0 Jan  1 00:00 gpiochip408 -> 
../../devices/platform/soc/1b500000.pci/pci0000:00/0000:00:00.0/0000:01:00.0/gpio/gpiochip408
lrwxrwxrwx    1 root     root             0 Jan  1 00:00 gpiochip443 -> 
../../devices/platform/soc/800000.pinmux/gpio/gpiochip443


before the patch

lrwxrwxrwx    1 root     root             0 Jan  1  1970 gpiochip0 -> 
../../devices/platform/soc/800000.pinmux/gpio/gpiochip0
lrwxrwxrwx    1 root     root             0 May 31 13:13 gpiochip442 -> 
../../devices/platform/soc/1b700000.pci/pci0001:00/0001:00:00.0/0001:01:00.0/gpio/gpiochip442
lrwxrwxrwx    1 root     root             0 May 31 13:13 gpiochip477 -> 
../../devices/platform/soc/1b500000.pci/pci0000:00/0000:00:00.0/0000:01:00.0/gpio/gpiochip477


this broke my userspace gpio handling. i can override this, but still it 
doesnt look correct since there is a hole at the beginng likelly 
reserved by unused arm gpios

>
>
>