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Message-ID: <tip-d71f11c076c420c4e2fceb4faefa144e055e0935@git.kernel.org>
Date: Thu, 31 May 2018 05:30:33 -0700
From: tip-bot for Kan Liang <tipbot@...or.com>
To: linux-tip-commits@...r.kernel.org
Cc: kan.liang@...el.com, linux-kernel@...r.kernel.org,
torvalds@...ux-foundation.org, mingo@...nel.org, hpa@...or.com,
peterz@...radead.org, tglx@...utronix.de
Subject: [tip:perf/core] perf/x86/intel/uncore: Correct fixed counter index
check for NHM
Commit-ID: d71f11c076c420c4e2fceb4faefa144e055e0935
Gitweb: https://git.kernel.org/tip/d71f11c076c420c4e2fceb4faefa144e055e0935
Author: Kan Liang <kan.liang@...el.com>
AuthorDate: Thu, 3 May 2018 11:25:07 -0700
Committer: Ingo Molnar <mingo@...nel.org>
CommitDate: Thu, 31 May 2018 12:36:28 +0200
perf/x86/intel/uncore: Correct fixed counter index check for NHM
For Nehalem and Westmere, there is only one fixed counter for W-Box.
There is no index which is bigger than UNCORE_PMC_IDX_FIXED.
It is not correct to use >= to check fixed counter.
The code quality issue will bring problem when new counter index is
introduced.
Signed-off-by: Kan Liang <kan.liang@...el.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Reviewed-by: Thomas Gleixner <tglx@...utronix.de>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: acme@...nel.org
Cc: eranian@...gle.com
Link: http://lkml.kernel.org/r/1525371913-10597-2-git-send-email-kan.liang@intel.com
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
arch/x86/events/intel/uncore_nhmex.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/uncore_nhmex.c b/arch/x86/events/intel/uncore_nhmex.c
index 93e7a8397cde..173e2674be6e 100644
--- a/arch/x86/events/intel/uncore_nhmex.c
+++ b/arch/x86/events/intel/uncore_nhmex.c
@@ -246,7 +246,7 @@ static void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct p
{
struct hw_perf_event *hwc = &event->hw;
- if (hwc->idx >= UNCORE_PMC_IDX_FIXED)
+ if (hwc->idx == UNCORE_PMC_IDX_FIXED)
wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0);
else if (box->pmu->type->event_mask & NHMEX_PMON_CTL_EN_BIT0)
wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT22);
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