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Message-ID: <152787872536.144038.14465736571389918971@swboyd.mtv.corp.google.com>
Date:   Fri, 01 Jun 2018 11:45:25 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Kishon Vijay Abraham I <kishon@...com>,
        Manu Gautam <mgautam@...eaurora.org>, robh@...nel.org
Cc:     devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        dianders@...omium.org, evgreen@...omium.org,
        Vivek Gautam <vivek.gautam@...eaurora.org>,
        linux-arm-msm@...r.kernel.org, linux-usb@...r.kernel.org,
        Manu Gautam <mgautam@...eaurora.org>
Subject: Re: [PATCH v5 1/7] clk: msm8996-gcc: Mark halt check as no-op for USB/PCIE
 pipe_clk

Quoting Manu Gautam (2018-05-02 14:06:08)
> The USB and PCIE pipe clocks are sourced from external clocks
> inside the QMP USB/PCIE PHYs. Enabling or disabling of PIPE RCG
> clocks is dependent on PHY initialization sequence hence
> update halt_check to BRANCH_HALT_SKIP for these clocks so
> that clock status bit is not polled when enabling or disabling
> the clocks. It allows to simplify PHY client driver code which
> is both user and source of the pipe_clk and avoid error logging
> related status check on clk_disable/enable.
> 
> Signed-off-by: Manu Gautam <mgautam@...eaurora.org>
> ---

Applied to clk-next

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