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Message-ID: <CAMuHMdV6sKMLGhWLELqJWXS8Vj5Cnh82NE8MYOwU6EDWvoSTrg@mail.gmail.com>
Date:   Mon, 4 Jun 2018 13:48:55 +0200
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Finn Thain <fthain@...egraphics.com.au>
Cc:     Benjamin Herrenschmidt <benh@...nel.crashing.org>,
        Michael Schmitz <schmitzmic@...il.com>,
        linuxppc-dev <linuxppc-dev@...ts.ozlabs.org>,
        linux-m68k <linux-m68k@...ts.linux-m68k.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 03/11] macintosh/via-pmu: Don't clear shift register
 interrupt flag twice

On Sat, Jun 2, 2018 at 5:27 AM, Finn Thain <fthain@...egraphics.com.au> wrote:
> Clearing the interrupt flag twice in succession creates a theoretical
> race condition. Fix this.

I would add that the caller of pmu_sr_intr() has already cleared the flag,
so the casual reviewer doesn't have to hunt for it.

> Tested-by: Stan Johnson <userm57@...oo.com>
> Signed-off-by: Finn Thain <fthain@...egraphics.com.au>

Reviewed-by: Geert Uytterhoeven <geert@...ux-m68k.org>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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