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Message-ID: <CAMuHMdWoE=+sEUtFdPKk4eBGtOn8f7bUPV-HLAvEETuqgVMeVw@mail.gmail.com>
Date: Mon, 11 Jun 2018 12:00:39 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Michel Pollet <michel.pollet@...renesas.com>
Cc: Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
Simon Horman <horms@...ge.net.au>,
Phil Edworthy <phil.edworthy@...esas.com>,
Michel Pollet <buserror+upstream@...il.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
linux-clk <linux-clk@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v8 2/5] dt-bindings: clock: renesas,r9a06g032-sysctrl: documentation
Hi Michel,
On Tue, Jun 5, 2018 at 10:36 AM Michel Pollet
<michel.pollet@...renesas.com> wrote:
> The Renesas R9A06G032 SYSCTRL node description.
>
> Signed-off-by: Michel Pollet <michel.pollet@...renesas.com>
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.txt
> @@ -0,0 +1,32 @@
> +* Renesas R9A06G032 SYSCTRL
> +
> +Required Properties:
> +
> + - compatible: Must be:
> + - "renesas,r9a06g032-sysctrl"
> + - reg: Base address and length of the SYSCTRL IO block.
> + - #clock-cells: Must be 1
(repeating myself) No clocks/clock-names for the external clock inputs?
"RZ/N1 has 3 clock sources, 1 reference clock inputs for RGMII, and 2
reference clock outputs for RMII/MII."
The rest looks fine to me.
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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