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Message-ID: <CAHp75Vc_EVgfj1MpuA_hKHgy6SiQdU7JQDdtVHfOT1sZ_K-nRQ@mail.gmail.com>
Date:   Tue, 12 Jun 2018 11:13:29 +0300
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Songjun Wu <songjun.wu@...ux.intel.com>
Cc:     hua.ma@...ux.intel.com, yixin.zhu@...ux.intel.com,
        chuanhua.lei@...el.com,
        Linux MIPS Mailing List <linux-mips@...ux-mips.org>,
        qi-ming.wu@...el.com, linux-clk@...r.kernel.org,
        "open list:SERIAL DRIVERS" <linux-serial@...r.kernel.org>,
        devicetree <devicetree@...r.kernel.org>,
        James Hogan <jhogan@...nel.org>, Jiri Slaby <jslaby@...e.com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Ralf Baechle <ralf@...ux-mips.org>
Subject: Re: [PATCH 4/7] tty: serial: lantiq: Always use readl()/writel()

On Tue, Jun 12, 2018 at 8:40 AM, Songjun Wu <songjun.wu@...ux.intel.com> wrote:
> Previous implementation uses platform-dependent functions
> ltq_w32()/ltq_r32() to access registers. Those functions are not
> available for other SoC which uses the same IP.
> Change to OS provided readl()/writel() and readb()/writeb(), so
> that different SoCs can use the same driver.

This patch consists 2 or even 3 ones:
- whitespace shuffling (indentation fixes, blank lines), I dunno if
it's needed at all
- some new registers / bits
- actual switch to readl() / writel()

Please, split.

> +#define asc_w32_mask(clear, set, reg)  \
> +       ({ typeof(reg) reg_ = (reg);    \
> +       writel((readl(reg_) & ~(clear)) | (set), reg_); })

This would be better as a static inline helper, and name is completely
misleading, it doesn't mask the register bits, it _updates_ them.

-- 
With Best Regards,
Andy Shevchenko

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