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Message-ID: <20180614145942.GA4885@lst.de>
Date: Thu, 14 Jun 2018 16:59:42 +0200
From: Christoph Hellwig <hch@....de>
To: Alex Williamson <alex.williamson@...hat.com>
Cc: Srinath Mannam <srinath.mannam@...adcom.com>,
Sinan Kaya <okaya@...eaurora.org>,
Christoph Hellwig <hch@....de>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Abhishek Shah <abhishek.shah@...adcom.com>,
Vikram Prakash <vikram.prakash@...adcom.com>,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-nvme@...ts.infradead.org, kvm@...r.kernel.org,
linux-pci-owner@...r.kernel.org
Subject: Re: Requirement to get BAR pci_bus_address in user space
On Thu, Jun 14, 2018 at 08:50:15AM -0600, Alex Williamson wrote:
> I don't understand the CQ vs CMB, but I think I gather that there's some
> sort of buffer that's allocated from within the devices MMIO BAR and
> some programming of the device needs to reference that buffer.
> Wouldn't you therefore use the vfio type1 IOMMU MAP_DMA ioctl to map
> the BAR into the IOVA address space and you can then use the IOVA +
> offset into the BAR for the device to reference the buffer? It seems
> this is the same way we'd setup a peer-to-peer mapping, but we're using
> it for the device to reference itself effectively. Thanks,
That's exactly what I meant..
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