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Message-ID: <1373980460.14412.1529084239034.JavaMail.zimbra@efficios.com>
Date: Fri, 15 Jun 2018 13:37:19 -0400 (EDT)
From: Mathieu Desnoyers <mathieu.desnoyers@...icios.com>
To: James Hogan <jhogan@...nel.org>
Cc: Paul Burton <paul.burton@...s.com>,
linux-mips <linux-mips@...ux-mips.org>,
Peter Zijlstra <peterz@...radead.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
Boqun Feng <boqun.feng@...il.com>,
"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>,
Ralf Baechle <ralf@...ux-mips.org>
Subject: Re: [PATCH 4/4] rseq/selftests: Implement MIPS support
----- On Jun 15, 2018, at 6:58 AM, James Hogan jhogan@...nel.org wrote:
> On Thu, Jun 14, 2018 at 04:52:10PM -0700, Paul Burton wrote:
>> +#define __RSEQ_ASM_DEFINE_TABLE(version, flags, start_ip, \
>
> Nit: technically all these \'s are on 81st column...
>
>> +#define __RSEQ_ASM_DEFINE_ABORT(table_label, label, teardown, \
>> + abort_label, version, flags, \
>> + start_ip, post_commit_offset, abort_ip) \
>> + ".balign 32\n\t" \
>
> ARM doesn't do this for DEFINE_ABORT. Is it intentional that we do for
> MIPS?
Given that include/uapi/linux/rseq.h declares struct rseq_cs as
__attribute__((aligned(4 * sizeof(__u64)))), and considering this
comment:
/*
* struct rseq_cs is aligned on 4 * 8 bytes to ensure it is always
* contained within a single cache-line. It is usually declared as
* link-time constant data.
*/
The .balign 32 is the right thing to do here. I will add a .balign 32
to ARM selftests code as well.
Thanks,
Mathieu
>
> Thanks
> James
--
Mathieu Desnoyers
EfficiOS Inc.
http://www.efficios.com
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