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Message-ID: <1713657.Ecv5Pr7be3@diego>
Date:   Sat, 16 Jun 2018 15:00:06 +0200
From:   Heiko Stübner <heiko@...ech.de>
To:     Lin Huang <hl@...k-chips.com>
Cc:     seanpaul@...omium.org, airlied@...ux.ie, zyw@...k-chips.com,
        dgreid@...omium.org, broonie@...nel.org, dianders@...omium.org,
        briannorris@...omium.org, linux-rockchip@...ts.infradead.org,
        daniel.vetter@...el.com, dri-devel@...ts.freedesktop.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        jeffy.chen@...k-chips.com
Subject: Re: [PATCH 1/2] drm/rockchip: cnd-dp: adjust spdif register setting

Am Dienstag, 22. Mai 2018, 10:53:41 CEST schrieb Lin Huang:
> We use jitter bypass mode for spdif, so do not need to set jitter mode
> related bit in SPDIF_CTRL_ADDR register. Also, we need to enable
> SPDIF_ENABLE bit.
> 
> Signed-off-by: Chris Zhong <zyw@...k-chips.com>
> Signed-off-by: Lin Huang <hl@...k-chips.com>

applied to drm-misc-next after adapting the commit message
to make it clear that we need to keep the SPDIF_ENABLE bit.


Thanks
Heiko


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