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Message-ID: <55a20153-9416-404b-7442-ed851386e2e0@amd.com>
Date: Mon, 18 Jun 2018 13:46:11 -0500
From: "Suthikulpanit, Suravee" <suravee.suthikulpanit@....com>
To: Borislav Petkov <bp@...en8.de>
Cc: x86@...nel.org, linux-kernel@...r.kernel.org, tglx@...utronix.de,
mingo@...hat.com
Subject: Re: [PATCH] x86/CPU/AMD: Fix LLC ID bit-shift calculation
Boris,
On 6/18/2018 1:23 PM, Borislav Petkov wrote:
> On Mon, Jun 18, 2018 at 01:14:11PM -0500, Suthikulpanit, Suravee wrote:
>> This enumeration is only for the family17h model 00-1Fh of hardware
>> revision. The patch is intended for the future revision of hardware.
>
> I realized that but the same holds true for the future revision - there
> you need to remove thread ID and core ID too, right?
>
Your understanding is correct. I was not sure about what you were
referring to earlier. Basically, the number of threads sharing cache is
used to calculate the amount of right-shifting of APIC ID, which results
in removing the core and thread ID bits.
Suravee
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