linux-kernel - Re: [PATCH v4 1/2] dt-bindings: cpufreq: Introduce QCOM CPUFREQ FW bindings

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Message-ID: <514eea88-1f98-7959-2341-3d57cff6f66b@codeaurora.org>
Date:   Tue, 19 Jun 2018 13:23:19 +0530
From:   Taniya Das <tdas@...eaurora.org>
To:     Sudeep Holla <sudeep.holla@....com>,
        Amit Kucheria <amit.kucheria@...durent.com>
Cc:     LKML <linux-kernel@...r.kernel.org>,
        Linux PM list <linux-pm@...r.kernel.org>,
        "Rafael J. Wysocki" <rjw@...ysocki.net>,
        Viresh Kumar <viresh.kumar@...aro.org>,
        Stephen Boyd <sboyd@...nel.org>,
        Rajendra Nayak <rnayak@...eaurora.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>, Rob Herring <robh@...nel.org>,
        Saravana Kannan <skannan@...eaurora.org>
Subject: Re: [PATCH v4 1/2] dt-bindings: cpufreq: Introduce QCOM CPUFREQ FW
 bindings



On 6/18/2018 2:51 PM, Sudeep Holla wrote:
> 
> 
> On 15/06/18 18:40, Taniya Das wrote:
>>
>>
>> On 6/15/2018 5:29 PM, Amit Kucheria wrote:
> 
> [...]
> 
>>> A future version of the HW engine, or more likely, a firmware
>>> revision, will make more functionality available. Say, this needs
>>> access to another register or two. This will require changing the DT
>>> bindings. Instead, if you map the entire address space, you can just
>>> add offsets to the new registers.
>>>
>>> So in this case, I think you should define the following addresses
>>> (size 0x1400) for the two frequency domains
>>>
>>> 0x17d43000, 0x1400 (power cluster)
>>> 0x17d45800, 0x1400 (perf cluster)
>>>
>>> And in the driver simply add offsets as follows:
>>>
>>> #define ENABLE_OFFSET               0x0
>>> #define LUT_OFFSET                      0x110
>>> #define PERF_DESIRED_OFFSET 0x920
>>>
>>
>> The offsets could vary across versions of this IP and that is the reason
>> to provide them through the DT and not define any such offsets.
>>
> 
> Just get compatibles to identify the version of the hardware if it can't
> be probed and detected. Please don't use DT to get the addresses of each
> register you use in the driver. That's neither scalable nor nice
> solution to the problem.
> Hello Sudeep and Amit,

Thanks for the comments, I am consolidating the understanding from the 
other emails in a single one.

I understand that you are looking for this IP to map the full region and 
define offsets according to access them.

But I still not sure how do you want this common driver to scale in the 
cases where the offsets could vary across version change.

  DT
====
   freq-node {
	reg = < X x_size>;   Where X is the start of the IP address.
   }

Driver code (The below representation is just for example).
=============

V1
#define ENABLE	0x0
#define LUT_V1	0x110
#define PERF_V1	0x920

V2
#define LUT_V2	0x150
#define PERF_V2	0x980

V3
#define LUT_V3	0x120
....

Do you want me to use "compatible" flag to

if (compatible == v1)
  enable =  readl_relaxed(X + LUT_V1);
else if (compatible == v2)
  enable = readl_relaxed(X + LUT_V2);
else if (compatible == v3)
  enable = readl_relaxed(X + LUT_V2);

With the current design I do not need such compatible checks and unmap 
the ones which are not required after probe. Please let me know your 
comments.

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