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Date: Tue, 19 Jun 2018 12:46:04 +0200 From: Richard Weinberger <richard@....at> To: Masahiro Yamada <yamada.masahiro@...ionext.com> Cc: Boris Brezillon <boris.brezillon@...tlin.com>, linux-mtd <linux-mtd@...ts.infradead.org>, Rob Herring <robh+dt@...nel.org>, Linux Kbuild mailing list <linux-kbuild@...r.kernel.org>, "linux-stable #4 . 14+" <stable@...r.kernel.org>, DTML <devicetree@...r.kernel.org>, Miquel Raynal <miquel.raynal@...tlin.com>, Linux Kernel Mailing List <linux-kernel@...r.kernel.org>, Marek Vasut <marek.vasut@...il.com>, Brian Norris <computersforpeace@...il.com>, David Woodhouse <dwmw2@...radead.org>, Mark Rutland <mark.rutland@....com> Subject: Re: [PATCH v3 1/3] mtd: rawnand: denali_dt: add more clocks based on IP datasheet Am Dienstag, 19. Juni 2018, 10:07:26 CEST schrieb Masahiro Yamada: > Hi Boris, > > > 2018-06-18 16:46 GMT+09:00 Boris Brezillon <boris.brezillon@...tlin.com>: > > On Mon, 18 Jun 2018 09:09:02 +0200 > > Richard Weinberger <richard@....at> wrote: > > > >> Am Freitag, 15. Juni 2018, 03:18:50 CEST schrieb Masahiro Yamada: > >> > According to the Denali User's Guide, this IP needs three clocks: > >> > > >> > - clk: controller core clock > >> > > >> > - clk_x: bus interface clock > >> > > >> > - ecc_clk: clock at which ECC circuitry is run > >> > > >> > Currently, denali_dt.c requires a single anonymous clock and its > >> > frequency. However, the driver needs to get the frequency of "clk_x" > >> > not "clk". This is confusing because people tend to assume the > >> > anonymous clock means the core clock. In fact, I got a report of > >> > SOCFPGA breakage because the timing parameters are calculated based > >> > on a wrong frequency. > >> > > >> > Instead of the cheesy implementation, the clocks in the real hardware > >> > should be represented in the driver and the DT-binding. > >> > > >> > However, adding new clocks would break the existing platforms. For the > >> > backward compatibility, the driver still accepts a single clock just as > >> > before. If clk_x is missing, clk_x_rate is set to a hardcoded value. > >> > This is fine for existing DT of Socionext UniPhier, and also fixes the > >> > issue of Altera (Intel) SOCFPGA because both platforms use 200 MHz for > >> > the bus interface clock. > >> > > >> > Fixes: 1bb88666775e ("mtd: nand: denali: handle timing parameters by setup_data_interface()") > >> > Cc: linux-stable <stable@...r.kernel.org> #4.14+ > >> > Reported-by: Richard Weinberger <richard@....at> > >> > Signed-off-by: Masahiro Yamada <yamada.masahiro@...ionext.com> > >> > >> Reviewed-by: Richard Weinberger <richard@....at> > > > > Maybe a > > > > Tested-by: Richard Weinberger <richard@....at> > > > > ? > > > >> Reported-by: Philipp Rosenberger <p.rosenberger@...utronix.de> > > > > Should I replace your Reported-by by this one or simply add it? Philipp deserves the Reported-by. :) > > I think it is good to have Reported-by > both from Philipp and Richard. Patch 1/3 unbreaks v4.14.x on my board. Tested-by: Richard Weinberger <richard@....at> Thanks, //richard
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