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Message-ID: <alpine.DEB.2.21.1806200813400.10546@nanos.tec.linutronix.de>
Date: Wed, 20 Jun 2018 08:21:34 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Reinette Chatre <reinette.chatre@...el.com>
cc: fenghua.yu@...el.com, tony.luck@...el.com,
vikas.shivappa@...ux.intel.com, gavin.hindman@...el.com,
jithu.joseph@...el.com, dave.hansen@...el.com, mingo@...hat.com,
hpa@...or.com, x86@...nel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V5 00/38] Intel(R) Resource Director Technology Cache
Pseudo-Locking enabling
Reinette,
On Tue, 19 Jun 2018, Reinette Chatre wrote:
> I am sorry for adding confusion by keeping the changelog from previous
> versions with each new submission. v3 had 39 patches with the last patch
> depending on Mike's work. I removed that final patch in v4, planning to
> resubmit it when Mike's work has been merged since it seems the API I
> used may change.
Nothing to be sorry about. I just wanted to make sure, that I'm not missing
something,
All in all this was a very enjoyable read through and the whole thing is
very well done! I played around with the exclusive mode and it's a useful
improvement: it immediately catched that I'm not able to count :)
Great job!
Thanks,
Thomas
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