| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20180620083653.17010-3-andrea.merello@gmail.com>
Date: Wed, 20 Jun 2018 10:36:50 +0200
From: Andrea Merello <andrea.merello@...il.com>
To: vkoul@...nel.org, dan.j.williams@...el.com,
michal.simek@...inx.com, appana.durga.rao@...inx.com,
dmaengine@...r.kernel.org
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Andrea Merello <andrea.merello@...il.com>
Subject: [PATCH 3/6] dt-bindings: xilinx_dma: add required xlnx,lengthregwidth property
The width of the "length register" cannot be autodetected, and it is now
specified with a DT property. Add DOC for it.
Signed-off-by: Andrea Merello <andrea.merello@...il.com>
---
Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
index a2b8bfaec43c..acecdc5d8d47 100644
--- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
+++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
@@ -36,6 +36,8 @@ Required properties:
Required properties for VDMA:
- xlnx,num-fstores: Should be the number of framebuffers as configured in h/w.
+Required properties for AXI DMA:
+- xlnx,lengthregwidth: Should be the width of the length register as configured in h/w.
Optional properties:
- xlnx,include-sg: Tells configured for Scatter-mode in
--
2.17.1
Powered by blists - more mailing lists