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Message-ID: <CAMuHMdUin=CjcWvR=nCm9vN-8VWaNXbFt+3k_MUEOmqpKoe2mA@mail.gmail.com>
Date: Fri, 22 Jun 2018 15:29:30 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Michel Pollet <michel.pollet@...renesas.com>
Cc: Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
Simon Horman <horms@...ge.net.au>,
Phil Edworthy <phil.edworthy@...esas.com>,
Michel Pollet <buserror+upstream@...il.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
linux-clk <linux-clk@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v9 5/5] clk: renesas: Renesas R9A06G032 clock driver
Hi Michel,
On Thu, Jun 14, 2018 at 1:03 PM Michel Pollet
<michel.pollet@...renesas.com> wrote:
> This provides a clock driver for the Renesas R09A06G032.
> This uses a structure derived from both the RCAR gen2 driver as well as
> the renesas-cpg-mssr driver.
>
> Signed-off-by: Michel Pollet <michel.pollet@...renesas.com>
Thanks for your patch!
> --- /dev/null
> +++ b/drivers/clk/renesas/r9a06g032-clocks.c
> +static int __init r9a06g032_clocks_probe(struct platform_device *pdev)
> +{
[...]
> + error = of_clk_add_provider(np, of_clk_src_onecell_get, &clocks->data);
> + if (error)
> + return error;
> +
> + error = devm_add_action_or_reset(
> + dev, r9a06g032_clocks_del_clk_provider, np);
> +
> + return error;
This could just be "return devm_add_action_or_reset(...);".
Queuing in clk-renesas-for-v4.19 with the above small change.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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