linux-kernel - Re: [PATCH 2/7] x86,tlb: leave lazy TLB mode at page table free time

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Date:   Fri, 22 Jun 2018 11:17:05 -0400
From:   Rik van Riel <riel@...riel.com>
To:     Andy Lutomirski <luto@...nel.org>
Cc:     LKML <linux-kernel@...r.kernel.org>, x86@...nel.org,
        Ingo Molnar <mingo@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Mike Galbraith <efault@....de>, songliubraving@...com,
        kernel-team <kernel-team@...com>
Subject: Re: [PATCH 2/7] x86,tlb: leave lazy TLB mode at page table free time

On Fri, 2018-06-22 at 07:58 -0700, Andy Lutomirski wrote:
> On Wed, Jun 20, 2018 at 12:57 PM Rik van Riel <riel@...riel.com>
> wrote:
> > 
> > +++ b/arch/x86/mm/tlb.c
> > @@ -646,6 +646,30 @@ void flush_tlb_mm_range(struct mm_struct *mm,
> > unsigned long start,
> >         put_cpu();
> >  }
> > 
> > +void tlb_flush_remove_tables_local(void *arg)
> > +{
> > +       struct mm_struct *mm = arg;
> > +
> > +       if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm &&
> > +                       this_cpu_read(cpu_tlbstate.is_lazy))
> > +               /*
> > +                * We're in lazy mode.  We need to at least flush
> > our
> > +                * paging-structure cache to avoid speculatively
> > reading
> > +                * garbage into our TLB.  Since switching to
> > init_mm is barely
> > +                * slower than a minimal flush, just switch to
> > init_mm.
> > +                */
> > +               switch_mm_irqs_off(NULL, &init_mm, NULL);
> 
> Can you add braces?

Will do.

> > +}
> > +
> > +void tlb_flush_remove_tables(struct mm_struct *mm)
> > +{
> > +       int cpu = get_cpu();
> > +       /*
> > +        * XXX: this really only needs to be called for CPUs in
> > lazy TLB mode.
> > +        */
> > +       if (cpumask_any_but(mm_cpumask(mm), cpu) < nr_cpu_ids)
> > +               smp_call_function_many(mm_cpumask(mm),
> > tlb_flush_remove_tables_local, (void *)mm, 1);
> 
> I suspect that most if the gain will come from fixing this limitation
> :)

Patch 5 does that.

However, I suspect most of the gain comes from
not having mprotect and madvise send IPIs to
lazy TLB mode CPUs at all any more :)

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