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Message-Id: <20180622033440.GM3593@linux.vnet.ibm.com>
Date: Thu, 21 Jun 2018 20:34:40 -0700
From: "Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Alan Stern <stern@...land.harvard.edu>,
LKMM Maintainers -- Akira Yokosawa <akiyks@...il.com>,
Andrea Parri <andrea.parri@...rulasolutions.com>,
Boqun Feng <boqun.feng@...il.com>,
David Howells <dhowells@...hat.com>,
Jade Alglave <j.alglave@....ac.uk>,
Luc Maranget <luc.maranget@...ia.fr>,
Nicholas Piggin <npiggin@...il.com>,
Will Deacon <will.deacon@....com>,
Kernel development list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] tools/memory-model: Add write ordering by
release-acquire and by locks
On Thu, Jun 21, 2018 at 08:04:22PM +0200, Peter Zijlstra wrote:
> On Thu, Jun 21, 2018 at 01:27:12PM -0400, Alan Stern wrote:
> > More than one kernel developer has expressed the opinion that the LKMM
> > should enforce ordering of writes by release-acquire chains and by
> > locking. In other words, given the following code:
> >
> > WRITE_ONCE(x, 1);
> > spin_unlock(&s):
> > spin_lock(&s);
> > WRITE_ONCE(y, 1);
> >
> > or the following:
> >
> > smp_store_release(&x, 1);
> > r1 = smp_load_acquire(&x); // r1 = 1
> > WRITE_ONCE(y, 1);
> >
> > the stores to x and y should be propagated in order to all other CPUs,
> > even though those other CPUs might not access the lock s or be part of
> > the release-acquire chain. In terms of the memory model, this means
> > that rel-rf-acq-po should be part of the cumul-fence relation.
> >
> > All the architectures supported by the Linux kernel (including RISC-V)
> > do behave this way, albeit for varying reasons. Therefore this patch
> > changes the model in accordance with the developers' wishes.
> >
> > Signed-off-by: Alan Stern <stern@...land.harvard.edu>
>
> Thanks for that Alan!
>
> Acked-by: Peter Zijlstra (Intel) <peterz@...radead.org>
I queued both, with Peter's ack on the second, thank you both!
(Peter, if you meant to ack both, please let me know.)
Thanx, Paul
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