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Message-ID: <d4fdcd1d-db20-1837-a037-0982a042d357@kernel.org>
Date:   Mon, 25 Jun 2018 09:50:18 -0500
From:   Dinh Nguyen <dinguyen@...nel.org>
To:     Richard Weinberger <richard@....at>,
        Masahiro Yamada <yamada.masahiro@...ionext.com>
Cc:     DTML <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-mtd <linux-mtd@...ts.infradead.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Marek VaĊĦut <marek.vasut@...il.com>,
        Brian Norris <computersforpeace@...il.com>,
        David Woodhouse <dwmw2@...radead.org>,
        Miquel Raynal <miquel.raynal@...tlin.com>,
        Boris Brezillon <boris.brezillon@...tlin.com>
Subject: Re: [PATCH] arm: dts: socfpga: denali needs nand_x_clk too



On 06/22/2018 10:58 AM, Richard Weinberger wrote:
> Masahiro,
> 
> Am Freitag, 22. Juni 2018, 16:37:21 CEST schrieb Masahiro Yamada:
>> Hi Richard,
>>
>>
>> 2018-06-19 21:07 GMT+09:00 Richard Weinberger <richard@....at>:
>>> The denali NAND flash controller needs at least two clocks to operate,
>>> nand_clk and nand_x_clk.
>>> Since 1bb88666775e ("mtd: nand: denali: handle timing parameters by
>>> setup_data_interface()") nand_x_clk is used to derive timing settings.
>>>
>>> Signed-off-by: Richard Weinberger <richard@....at>
>>> ---
>>> Strictly speaking denali needs a ecc_clk too, but AFAIK such a clock
>>> is not present on this SoC.
>>> But my SoCFPGA knowledge is very limited.
>>>
>>> Thanks,
>>> //richard
>>> ---
>>>  arch/arm/boot/dts/socfpga.dtsi | 3 ++-
>>>  1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
>>> index 486d4e7433ed..562f7b375bbd 100644
>>> --- a/arch/arm/boot/dts/socfpga.dtsi
>>> +++ b/arch/arm/boot/dts/socfpga.dtsi
>>> @@ -754,7 +754,8 @@
>>>                         reg-names = "nand_data", "denali_reg";
>>>                         interrupts = <0x0 0x90 0x4>;
>>>                         dma-mask = <0xffffffff>;
>>> -                       clocks = <&nand_clk>;
>>> +                       clocks = <&nand_clk>, <&nand_x_clk>;
>>> +                       clock-names = "nand", "nand_x";
>>
>>
>> IMHO, this should be
>>
>>                           clocks = <&nand_clk>, <&nand_x_clk>, <&nand_x_clk>;
>>                           clock-names = "nand", "nand_x", "ecc";

No, it should be just the nand_x and ecc.

There's already a patch to use the nand_x_clk and not the nand_clk.

https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git/commit/?h=socfpga_for_next_v4.19_fixes_v1&id=1709ab58eb79b19bceb2287d111bf1bd2df1cf6d

Dinh

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