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Message-ID: <20180628121641.olxjhxau2kqqlmwb@verge.net.au>
Date: Thu, 28 Jun 2018 14:16:41 +0200
From: Simon Horman <horms@...ge.net.au>
To: Michel Pollet <michel.pollet@...renesas.com>
Cc: linux-renesas-soc@...r.kernel.org, phil.edworthy@...esas.com,
Michel Pollet <buserror+upstream@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Magnus Damm <magnus.damm@...il.com>,
Chen-Yu Tsai <wens@...e.org>,
Kevin Hilman <khilman@...libre.com>,
Maxime Ripard <maxime.ripard@...tlin.com>,
Florian Fainelli <f.fainelli@...il.com>,
Rajendra Nayak <rnayak@...eaurora.org>,
Carlo Caione <carlo@...lessm.com>,
Stefan Wahren <stefan.wahren@...e.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v7 1/3] dt-bindings: cpu: Add Renesas R9A06G032 SMP
enable method.
On Thu, Jun 28, 2018 at 09:17:12AM +0100, Michel Pollet wrote:
> Add a special enable method for second CA7 of the R9A06G032
>
> Signed-off-by: Michel Pollet <michel.pollet@...renesas.com>
> Reviewed-by: Rob Herring <robh@...nel.org>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
> Reviewed-by: Simon Horman <horms+renesas@...ge.net.au>
Thanks, applied.
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