lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <bd1ceedd-25db-7105-6005-c38678b10584@codeaurora.org>
Date:   Thu, 28 Jun 2018 09:19:39 +0530
From:   Manu Gautam <mgautam@...eaurora.org>
To:     Can Guo <cang@...eaurora.org>, subhashj@...eaurora.org,
        asutoshd@...eaurora.org, vivek.gautam@...eaurora.org,
        kishon@...com, robh+dt@...nel.org, mark.rutland@....com
Cc:     linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH v7 1/4] phy: Update PHY power control sequence



On 6/19/2018 2:06 PM, Can Guo wrote:
> All PHYs should be powered on before register configuration starts. And
> only PCIe PHYs need an extra power control before deasserts reset state.
> 
> Signed-off-by: Can Guo <cang@...eaurora.org>
> ---
>  drivers/phy/qualcomm/phy-qcom-qmp.c | 19 ++++++++++++-------
>  1 file changed, 12 insertions(+), 7 deletions(-)

Reviewed-by: Manu Gautam <mgautam@...eaurora.org>

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ