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Message-Id: <1530256915-25034-2-git-send-email-alanx.chiang@intel.com>
Date:   Fri, 29 Jun 2018 15:21:54 +0800
From:   alanx.chiang@...el.com
To:     linux-i2c@...r.kernel.org
Cc:     andy.yeh@...el.com, sakari.ailus@...ux.intel.com,
        andriy.shevchenko@...ux.intel.com, andriy.shevchenko@...el.com,
        rajmohan.mani@...el.com, andy.shevchenko@...il.com,
        tfiga@...omium.org, jcliang@...omium.org, brgl@...ev.pl,
        robh+dt@...nel.org, mark.rutland@....com, arnd@...db.de,
        gregkh@...uxfoundation.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, Alan Chiang <alanx.chiang@...el.com>
Subject: [PATCH v4 1/2] dt-bindings: at24: Add address-width property

From: Alan Chiang <alanx.chiang@...el.com>

The AT24 series chips use 8-bit address by default. If some
chips would like to support more than 8 bits, the at24 driver
should be added the compatible field for specfic chips.

Provide a flexible way to determine the addressing bits through
address-width in this patch.

Signed-off-by: Alan Chiang <alanx.chiang@...el.com>
Signed-off-by: Andy Yeh <andy.yeh@...el.com>
Acked-by: Sakari Ailus <sakari.ailus@...ux.intel.com>

---
since v1:
-- Remove the address-width field in the example.
since v2:
-- Remove redundant space.
since v3:
-- Add Acked-by.

---
 Documentation/devicetree/bindings/eeprom/at24.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/eeprom/at24.txt b/Documentation/devicetree/bindings/eeprom/at24.txt
index 61d833a..aededdb 100644
--- a/Documentation/devicetree/bindings/eeprom/at24.txt
+++ b/Documentation/devicetree/bindings/eeprom/at24.txt
@@ -72,6 +72,8 @@ Optional properties:
 
   - wp-gpios: GPIO to which the write-protect pin of the chip is connected.
 
+  - address-width: number of address bits (one of 8, 16).
+
 Example:
 
 eeprom@52 {
-- 
2.7.4

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