linux-kernel - Re: [PATCH v1 0/6] x86/tsc: Clean up legacy code for Intel MID

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Date:   Sat, 30 Jun 2018 14:59:08 +0300
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Thomas Gleixner <tglx@...utronix.de>
Cc:     Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Ingo Molnar <mingo@...hat.com>,
        "H. Peter Anvin" <hpa@...or.com>,
        "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>,
        Pavel Tatashin <pasha.tatashin@...cle.com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v1 0/6] x86/tsc: Clean up legacy code for Intel MID

On Sat, Jun 30, 2018 at 12:24 PM, Thomas Gleixner <tglx@...utronix.de> wrote:
> On Fri, 29 Jun 2018, Andy Shevchenko wrote:
>
>> As Thomas noticed there is unusual initialization is going on on Intel MID
>> platforms when TSC is being calibrated.
>>
>> It appears that we have tsc_msr.c to support Intel MID in a more generic way.
>>
>> So, this patch series removes legacy calibration code and does accompanying
>> clean ups.
>>
>> Has been tested on Intel Medfield and Intel Merrifield platforms.
>
> Nice series from a quick glance! I'll have a deeper look on monday.
>
> One thing on top. From your earlier reply:
>
>> This sounds like a stub against very old calibration code since Intel
>> MID has no PIT, HPET, PMTIMER to calibrate from.
>
> As we already know that the legacy calibration cannot work on those
> machines, we really should splt out the msr/cpuid based calibration method
> into a separate function, which is set for the intel MID stuff and called
> from native_calibrate_tsc/cpu.
>
> Hmm?

But that's what has been done back in 2013! By some reason, I dunno
why, the same author didn't clean up it.


-- 
With Best Regards,
Andy Shevchenko