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Message-ID: <88cab816-3bc1-5e0b-7282-4ca05f458a9a@linux.intel.com>
Date: Tue, 3 Jul 2018 10:21:58 -0700
From: Jae Hyun Yoo <jae.hyun.yoo@...ux.intel.com>
To: Rob Herring <robh@...nel.org>
Cc: Lee Jones <lee.jones@...aro.org>,
Mark Rutland <mark.rutland@....com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
openbmc@...ts.ozlabs.org, Andrew Jeffery <andrew@...id.au>,
James Feist <james.feist@...ux.intel.com>,
Jason M Biils <jason.m.bills@...ux.intel.com>,
Joel Stanley <joel@....id.au>,
Vernon Mauery <vernon.mauery@...ux.intel.com>
Subject: Re: [PATCH linux-next v6 07/13] dt-bindings: mfd: Add a document for
PECI client MFD
Hi Rob,
Thanks for the review. Please see my inline answer.
On 7/3/2018 9:58 AM, Rob Herring wrote:
> On Thu, Jun 21, 2018 at 12:40:54PM -0700, Jae Hyun Yoo wrote:
>> This commit adds a dt-bindings document for PECI client MFD.
>
> This and the next patch still have the same issues I've outlined in at
> least 2 prior versions.
>
Okay. I think the next patch (9/13) for hwmon dt-bindings document
is not needed anymore because those were already added in MFD driver
implementation in the patch 8/13. Please correct me if it's not
you pointed.
>> Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@...ux.intel.com>
>> Cc: Andrew Jeffery <andrew@...id.au>
>> Cc: James Feist <james.feist@...ux.intel.com>
>> Cc: Jason M Biils <jason.m.bills@...ux.intel.com>
>> Cc: Joel Stanley <joel@....id.au>
>> Cc: Vernon Mauery <vernon.mauery@...ux.intel.com>
>> ---
>> .../bindings/mfd/intel-peci-client.txt | 34 +++++++++++++++++++
>> 1 file changed, 34 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/mfd/intel-peci-client.txt
>>
>> diff --git a/Documentation/devicetree/bindings/mfd/intel-peci-client.txt b/Documentation/devicetree/bindings/mfd/intel-peci-client.txt
>> new file mode 100644
>> index 000000000000..cb341e363add
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/mfd/intel-peci-client.txt
>> @@ -0,0 +1,34 @@
>> +* Intel PECI client bindings
>> +
>> +PECI (Platform Environment Control Interface) is a one-wire bus interface that
>> +provides a communication channel from PECI clients in Intel processors and
>> +chipset components to external monitoring or control devices. PECI is designed
>> +to support the following sideband functions:
>> +
>> +- Processor and DRAM thermal management
>> +- Platform Manageability
>> +- Processor Interface Tuning and Diagnostics
>> +- Failure Analysis
>> +
>> +Required properties:
>> +- compatible : Should be "intel,peci-client".
>> +- reg : Should contain address of a client CPU. Address range of CPU
>> + clients starts from 0x30 based on PECI specification.
>> +
>> +Example:
>> + peci-bus@0 {
>> + compatible = "vendor,soc-peci";
>> + reg = <0x0 0x1000>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + peci-client@30 {
>> + compatible = "intel,peci-client";
>> + reg = <0x30>;
>> + };
>> +
>> + peci-client@31 {
>> + compatible = "intel,peci-client";
>> + reg = <0x31>;
>> + };
>> + };
>> --
>> 2.17.1
>>
>
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