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Message-ID: <34a76fad5c43c11ce8ceb491537b453d8053bdb2.camel@intel.com>
Date: Wed, 4 Jul 2018 10:15:45 +0000
From: "Yang, Bin" <bin.yang@...el.com>
To: "tglx@...utronix.de" <tglx@...utronix.de>
CC: "mingo@...nel.org" <mingo@...nel.org>,
"hpa@...or.com" <hpa@...or.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"peterz@...radead.org" <peterz@...radead.org>,
"x86@...nel.org" <x86@...nel.org>
Subject: Re: [PATCH] x86/mm: fix cpu stuck issue in
__change_page_attr_set_clr
e820 table:
=================
[ 0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009fbff]
usable
[ 0.000000] BIOS-e820: [mem 0x000000000009fc00-0x000000000009ffff]
reserved
[ 0.000000] BIOS-e820: [mem 0x00000000000f0000-0x00000000000fffff]
reserved
[ 0.000000] BIOS-e820: [mem 0x0000000000100000-0x00000000bffdffff]
usable
[ 0.000000] BIOS-e820: [mem 0x00000000bffe0000-0x00000000bfffffff]
reserved
[ 0.000000] BIOS-e820: [mem 0x00000000feffc000-0x00000000feffffff]
reserved
[ 0.000000] BIOS-e820: [mem 0x00000000fffc0000-0x00000000ffffffff]
reserved
[ 0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000013fffffff]
usable
call chain:
======================
...
=> free_init_pages(what="initrd" or "unused kernel",
begin=ffff9b26b....000, end=ffff9b26c....000); begin and end addresses
are random. The begin/end value above is just for reference.
=> set_memory_rw()
=> change_page_attr_set()
=> change_page_attr_set_clr()
=> __change_page_attr_set_clr(); cpa->numpages is 512 on my board if
what=="unused kernel"
=> __change_page_attr()
=> try_preserve_large_page(); address=ffff9b26bfacf000, pfn=80000,
level=3; and the check loop count is 262144, exit loop after 861 usecs
on my board
the actual problem
===================
sometimes, free_init_pages returns after hundreds of secounds. The
major impact is kernel boot time.
On Wed, 2018-07-04 at 11:20 +0200, Thomas Gleixner wrote:
> On Wed, 4 Jul 2018, Yang, Bin wrote:
>
> > You are completely right. After considering, I think my patch is
> > like a
> > workaround but not real fix. I am trying to re-write a new patch
> > without cache implementation.
>
> Care to explain the actual problem coherently _before_ writing yet
> another
> patch?
>
> Thanks,
>
> tglx
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