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Message-ID: <20180704163517.GA13155@red-moon>
Date: Wed, 4 Jul 2018 17:35:29 +0100
From: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
To: Leonard Crestez <leonard.crestez@....com>,
Philipp Zabel <p.zabel@...gutronix.de>
Cc: Andrey Smirnov <andrew.smirnov@...il.com>,
Lucas Stach <l.stach@...gutronix.de>,
Richard Zhu <hongxing.zhu@....com>, linux-pci@...r.kernel.org,
linux-pm@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, Bjorn Helgaas <bhelgaas@...gle.com>,
Anson Huang <Anson.Huang@....com>,
Jingoo Han <jingoohan1@...il.com>,
Joao Pinto <Joao.Pinto@...opsys.com>,
"Rafael J. Wysocki" <rjw@...ysocki.net>,
Abel Vesa <abel.vesa@....com>
Subject: Re: [PATCH 1/2] reset: imx7: Fix always writing bits as 0
On Tue, May 29, 2018 at 10:39:16PM +0300, Leonard Crestez wrote:
> Right now the only user of reset-imx7 is pci-imx6 and the
> reset_control_assert and deassert calls on pciephy_reset don't toggle
> the PCIEPHY_BTN and PCIEPHY_G_RST bits as expected. Fix this by writing
> 1 or 0 respectively.
>
> The reference manual is not very clear regarding SRC_PCIEPHY_RCR but for
> other registers like MIPIPHY and HSICPHY the bits are explicitly
> documented as "1 means assert, 0 means deassert".
>
> The values are still reversed for IMX7_RESET_PCIE_CTRL_APPS_EN.
>
> Signed-off-by: Leonard Crestez <leonard.crestez@....com>
> ---
> drivers/reset/reset-imx7.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
I think Philipp will pick it up, so I will drop it from the PCI
patchwork, if there is a problem please let me know.
Thanks,
Lorenzo
> diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
> index 4db177bc89bc..fdeac1946429 100644
> --- a/drivers/reset/reset-imx7.c
> +++ b/drivers/reset/reset-imx7.c
> @@ -78,11 +78,11 @@ static struct imx7_src *to_imx7_src(struct reset_controller_dev *rcdev)
> static int imx7_reset_set(struct reset_controller_dev *rcdev,
> unsigned long id, bool assert)
> {
> struct imx7_src *imx7src = to_imx7_src(rcdev);
> const struct imx7_src_signal *signal = &imx7_src_signals[id];
> - unsigned int value = 0;
> + unsigned int value = assert ? signal->bit : 0;
>
> switch (id) {
> case IMX7_RESET_PCIEPHY:
> /*
> * wait for more than 10us to release phy g_rst and
> --
> 2.17.0
>
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