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Message-ID: <CAHp75Vfd2wcUV_dY5ns28+9aC32=OiVExuxOFu7ZjMU2dYuA4Q@mail.gmail.com>
Date: Wed, 4 Jul 2018 20:21:58 +0300
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Logan Gunthorpe <logang@...tatee.com>
Cc: Fabio Estevam <festevam@...il.com>,
Horia Geanta <horia.geanta@....com>,
Aymen Sghaier <aymen.sghaier@....com>,
Andrew Morton <akpm@...ux-foundation.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
Linux-Arch <linux-arch@...r.kernel.org>,
"linux-ntb@...glegroups.com" <linux-ntb@...glegroups.com>,
"open list:HARDWARE RANDOM NUMBER GENERATOR CORE"
<linux-crypto@...r.kernel.org>, Arnd Bergmann <arnd@...db.de>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Dan Douglass <dan.douglass@....com>,
Herbert Xu <herbert@...dor.apana.org.au>,
"David S. Miller" <davem@...emloft.net>
Subject: Re: [PATCH v18 6/7] crypto: caam: cleanup CONFIG_64BIT ifdefs when
using io{read|write}64
On Wed, Jul 4, 2018 at 8:16 PM, Andy Shevchenko
<andy.shevchenko@...il.com> wrote:
> On Wed, Jul 4, 2018 at 8:13 PM, Logan Gunthorpe <logang@...tatee.com> wrote:
>> On 7/4/2018 11:10 AM, Andy Shevchenko wrote:
>>> We have an iDMA 32-bit hardware (see drivers/dma/dw/) which has an
>>> extension 64-bit registers where only one of them has a specific bit
>>> to "commit" the changes written to all of them. And by some very
>>> unknown reason that bit is in lo part which automatically means we
>>> must to write it last.
>>
>> And it supports both BE and LE? And in both cases it's the lo part?
>
> It's only LE for now.
>
> P.S. If you more interested in code in kernel look for idma32_fifo_partition()
> (While the bit is set in each of 32-bit part, it's actually present in
> only one place)
I think it doesn't contradict with what you are saying rather supports it.
I would expect to have lo-hi and hi-lo semantics done according to the
data flow, not to the address.
--
With Best Regards,
Andy Shevchenko
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