linux-kernel - Re: [PATCH v2] x86-64: use 32-bit XOR to zero registers

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Date:   Wed, 4 Jul 2018 22:29:34 +0200
From:   Pavel Machek <pavel@....cz>
To:     Jan Beulich <JBeulich@...e.com>
Cc:     mingo@...e.hu, tglx@...utronix.de, hpa@...or.com,
        davem@...emloft.net, herbert@...dor.apana.org.au,
        rjw@...ysocki.net, Juergen Gross <jgross@...e.com>,
        linux-kernel@...r.kernel.org, Alok Kataria <akataria@...are.com>
Subject: Re: [PATCH v2] x86-64: use 32-bit XOR to zero registers

On Mon 2018-07-02 04:31:54, Jan Beulich wrote:
> Some Intel CPUs don't recognize 64-bit XORs as zeroing idioms. Zeroing
> idioms don't require execution bandwidth, as they're being taken care
> of in the frontend (through register renaming). Use 32-bit XORs instead.
> 
> Signed-off-by: Jan Beulich <jbeulich@...e.com>

> @@ -702,7 +702,7 @@ _no_extra_mask_1_\@:
>  
>  	# GHASH computation for the last <16 Byte block
>  	GHASH_MUL \AAD_HASH, %xmm13, %xmm0, %xmm10, %xmm11, %xmm5, %xmm6
> -	xor	%rax,%rax
> +	xor	%eax, %eax
>  
>  	mov	%rax, PBlockLen(%arg2)
>  	jmp	_dec_done_\@

This is rather subtle... and looks like a bug. To zero 64-bit
register, you zero its lower half, relying on implicit zeroing of the
upper half. Wow.

Perhaps we should get comments in the code? Because the explicit code
is more readable...

									Pavel
-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

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