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Message-ID: <20180705220629.rrin3sue6yrcfnnb@tetsubishi>
Date: Fri, 6 Jul 2018 00:06:29 +0200
From: Wolfram Sang <wsa@...-dreams.de>
To: Eddie James <eajames@...ux.vnet.ibm.com>
Cc: linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, robh+dt@...nel.org,
benh@...nel.crashing.org, joel@....id.au, mark.rutland@....com,
gregkh@...uxfoundation.org, rdunlap@...radead.org,
andy.shevchenko@...il.com, peda@...ntia.se
Subject: Re: [PATCH v10 4/7] i2c: fsi: Add abort and hardware reset procedures
Eddie,
> Thanks for the details. I have sent up a new series which will only do the
> bus reset if SDA is low. With our current hardware configuration, this
Thanks.
> *should* be sufficient to recover all the possible errors. However, there
> are configurations where it will not be enough, in which case getting the
> data line stuck high or clock line stuck either high or low can occur,
> necessitating the full reset. But since I can't demonstrate those at the
> moment, I can't argue to include that now :)
For the record, I am *really* interested in these cases. Just from
reading the above I wonder how SDA can stuck high when being open drain,
and how you will create 9 SCL pulses if SCL is stuck low. But if we have
a test case, we will figure out something together.
Thanks,
Wolfram
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