linux-kernel - Re: [linux-sunxi] [PATCH v2 8/9] arm64: allwinner: dts: h6: add USB3 device nodes

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Message-ID: <76682488-74B8-4CEE-ACD5-29C667C438AE@aosc.io>
Date:   Sat, 07 Jul 2018 11:37:52 +0800
From:   Icenowy Zheng <icenowy@...c.io>
To:     Chen-Yu Tsai <wens@...e.org>
CC:     Rob Herring <robh+dt@...nel.org>,
        Maxime Ripard <maxime.ripard@...tlin.com>,
        Kishon Vijay Abraham I <kishon@...com>,
        devicetree <devicetree@...r.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        linux-sunxi <linux-sunxi@...glegroups.com>
Subject: Re: [linux-sunxi] [PATCH v2 8/9] arm64: allwinner: dts: h6: add USB3 device nodes



于 2018年7月7日 GMT+08:00 上午11:35:22, Chen-Yu Tsai <wens@...e.org> 写到:
>On Fri, Jul 6, 2018 at 11:38 PM, Icenowy Zheng <icenowy@...c.io> wrote:
>> Allwinner H6 SoC features USB3 functionality, with a DWC3 controller
>and
>> a custom PHY.
>>
>> Add device tree nodes for them.
>>
>> Signed-off-by: Icenowy Zheng <icenowy@...c.io>
>> ---
>> Changes in v2:
>> - Rebased on top of the USB2 support patch.
>> - Dropped the dwc3-of-simple device.
>>
>>  arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 24
>++++++++++++++++++++
>>  1 file changed, 24 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
>b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
>> index 62fc0f5e10ba..6738e97ee37f 100644
>> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
>> @@ -229,6 +229,30 @@
>>                         status = "disabled";
>>                 };
>>
>> +               dwc3: dwc3 {
>> +                       compatible = "snps,dwc3";
>> +                       reg = <0x5200000 0x10000>;
>> +                       interrupts = <GIC_SPI 26
>IRQ_TYPE_LEVEL_HIGH>;
>> +                       /* The only clock is shared. */
>> +                       clocks = <&ccu CLK_BUS_XHCI>,
>> +                                <&ccu CLK_BUS_XHCI>,
>> +                                <&ccu CLK_BUS_XHCI>;
>> +                       clock-names = "ref", "bus_early", "suspend";
>
>The diagram in the user manual also shows the low speed 32k oscillator
>being fed into DWC3. Maybe someone with more knowledge of what the IP
>block expects can give us a clue about which one of these it is.

If possible, I think it's suspend clock.

I have checked RK3399 clk tree and USB3 ref is just a gate
on 24M osc, and bus clock is surely CLK_BUS_XHCI.

>
>ChenYu
>
>> +                       resets = <&ccu RST_BUS_XHCI>;
>> +                       /*
>> +                        * The datasheet of the chip doesn't declare
>the
>> +                        * peripheral function, and there's no boards
>known
>> +                        * to have a USB Type-B port routed to the
>port.
>> +                        * In addition, no one has tested the
>peripheral
>> +                        * function yet.
>> +                        * So set the dr_mode to "host" in the DTSI
>file.
>> +                        */
>> +                       dr_mode = "host";
>> +                       phys = <&usb3phy>;
>> +                       phy-names = "usb3-phy";
>> +                       status = "disabled";
>> +               };
>> +
>>                 usb3phy: phy@...0000 {
>>                         compatible = "allwinner,sun50i-h6-usb3-phy";
>>                         reg = <0x5210000 0x10000>;
>> --
>> 2.17.1
>>
>> --
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