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Message-ID: <153111468812.143105.11066074667783322403@swboyd.mtv.corp.google.com>
Date:   Sun, 08 Jul 2018 22:38:08 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Amit Nischal <anischal@...eaurora.org>,
        Michael Turquette <mturquette@...libre.com>
Cc:     Andy Gross <andy.gross@...aro.org>,
        David Brown <david.brown@...aro.org>,
        Rajendra Nayak <rnayak@...eaurora.org>,
        Odelu Kukatla <okukatla@...eaurora.org>,
        Taniya Das <tdas@...eaurora.org>,
        linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        Amit Nischal <anischal@...eaurora.org>
Subject: Re: [PATCH 3/4] dt-bindings: clock: Introduce QCOM Graphics clock bindings

Quoting Amit Nischal (2018-06-06 04:41:47)
> diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.txt b/Documentation/devicetree/bindings/clock/qcom,gpucc.txt
> new file mode 100644
> index 0000000..e311219
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.txt
> @@ -0,0 +1,18 @@
> +Qualcomm Graphics Clock & Reset Controller Binding
> +--------------------------------------------------
> +
> +Required properties :
> +- compatible : shall contain "qcom,sdm845-gpucc".
> +- reg : shall contain base register location and length.
> +- #clock-cells : from common clock binding, shall contain 1.
> +- #reset-cells : from common reset binding, shall contain 1.
> +- #power-domain-cells : from generic power domain binding, shall contain 1.
> +
> +Example:
> +       gpucc: clock-controller@@5090000 {

Drop the double '@'

> +               compatible = "qcom,sdm845-gpucc";
> +               reg = <0x5090000 0x9000>;
> +               #clock-cells = <1>;
> +               #reset-cells = <1>;
> +               #power-domain-cells = <1>;
> +       };

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