lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <EEBA739CCF11FE49B73E1FB4690F5EE649E2A6D0@SHSMSX101.ccr.corp.intel.com>
Date:   Mon, 9 Jul 2018 01:08:32 +0000
From:   "Tian, Baofeng" <baofeng.tian@...el.com>
To:     "tglx@...utronix.de" <tglx@...utronix.de>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "hpa@...or.com" <hpa@...or.com>, "x86@...nel.org" <x86@...nel.org>,
        "rostedt@...dmis.org" <rostedt@...dmis.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: [PATCH] Debug: Add cpu registers dump in case of kernel panic

From: "Tian, Baofeng" <baofeng.tian@...el.com>
Subject: [PATCH] Debug: Add cpu registers dump in case of kernel panic

When kernel panic, the value of cpu registers are needed for analyzing, through whole ramdump to restore the crash point.

We store CPU registers to RAM before cpu stopped, then get them with whole ram dump after warm reset.Those registers are used in analysis of dumped RAM image.

Signed-off-by: Baofeng, Tian <baofeng.tian@...el.com>
Signed-off-by: Emmanuel Berthier <emmanuel.berthier@...el.com>
---
 arch/x86/kernel/smp.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c index 5c574df..484831d 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -117,6 +117,20 @@
 static atomic_t stopping_cpu = ATOMIC_INIT(-1);  static bool smp_no_nmi_ipi = false;
 
+static DEFINE_PER_CPU(struct pt_regs, cpu_regs);
+
+/* Store regs of this CPU for RAM dump decoding help */ static inline 
+void store_regs(struct pt_regs *regs) {
+	struct pt_regs *print_regs;
+
+	print_regs = &get_cpu_var(cpu_regs);
+	crash_setup_regs(print_regs, regs);
+
+	/* Flush CPU cache */
+	wbinvd();
+}
+
 /*
  * this function sends a 'reschedule' IPI to another CPU.
  * it goes straight through and wastes no time serializing @@ -163,6 +177,7 @@ static int smp_stop_nmi_callback(unsigned int val, struct pt_regs *regs)
 	if (raw_smp_processor_id() == atomic_read(&stopping_cpu))
 		return NMI_HANDLED;
 
+	store_regs(regs);
 	cpu_emergency_vmxoff();
 	stop_this_cpu(NULL);
 
@@ -173,9 +188,10 @@ static int smp_stop_nmi_callback(unsigned int val, struct pt_regs *regs)
  * this function calls the 'stop' function on all other CPUs in the system.
  */
 
-asmlinkage __visible void smp_reboot_interrupt(void)
+__visible void smp_reboot_interrupt(struct pt_regs *regs)
 {
 	ipi_entering_ack_irq();
+	store_regs(regs);
 	cpu_emergency_vmxoff();
 	stop_this_cpu(NULL);
 	irq_exit();
@@ -247,6 +263,7 @@ static void native_stop_other_cpus(int wait)
 	}
 
 finish:
+	store_regs(NULL);
 	local_irq_save(flags);
 	disable_local_APIC();
 	mcheck_cpu_clear(this_cpu_ptr(&cpu_info));
--
2.7.4



Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ