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Message-ID: <dd7f96e4b08644769865adb302eb7d53@AcuMS.aculab.com>
Date:   Mon, 9 Jul 2018 15:02:08 +0000
From:   David Laight <David.Laight@...LAB.COM>
To:     'Peter Zijlstra' <peterz@...radead.org>,
        Alexey Brodkin <Alexey.Brodkin@...opsys.com>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "linux-snps-arc@...ts.infradead.org" 
        <linux-snps-arc@...ts.infradead.org>,
        "stable@...r.kernel.org" <stable@...r.kernel.org>,
        "greg@...ah.com" <greg@...ah.com>,
        "will.deacon@....com" <will.deacon@....com>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "linux-arch@...r.kernel.org" <linux-arch@...r.kernel.org>,
        "geert@...ux-m68k.org" <geert@...ux-m68k.org>
Subject: RE: [PATCH v3] devres: Explicitly align datai[] to 64-bit

From: Peter Zijlstra
> Sent: 09 July 2018 15:49
> On Mon, Jul 09, 2018 at 02:33:26PM +0000, Alexey Brodkin wrote:
> > > In fact, since alloc_dr() uses kmalloc() to allocate the entire thing,
> > > it is impossible to guarantee a larger alignment than kmalloc does.
> >
> > Well but 4-bytes [which is critical for atomic64_t] should be much less
> > than a sane cache line length so above should work.
> 
> AFAICT ARCH_KMALLOC_MINALIGN ends up being 4 on x86_32 (it doesn't
> define ARCH_DMA_MINALIGN and doesn't seem to otherwise override the
> thing).

That seems broken.

I wonder what the minimal alignment really is?
I suspect some code expects (and gets) 8-byte alignment.
The min alignment might even be 16 or 32 bytes.
There aren't many x86 instructions that fault on mis-aligned addresses,
but there are a few.
Mostly related to the fpu - probably including the fpu save area.

	David

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