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Message-Id: <20180710080114.31469-22-paul.kocialkowski@bootlin.com>
Date: Tue, 10 Jul 2018 10:01:13 +0200
From: Paul Kocialkowski <paul.kocialkowski@...tlin.com>
To: linux-media@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Cc: Mauro Carvalho Chehab <mchehab@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Maxime Ripard <maxime.ripard@...tlin.com>,
Chen-Yu Tsai <wens@...e.org>,
Paul Kocialkowski <paul.kocialkowski@...tlin.com>,
Marco Franchi <marco.franchi@....com>,
Icenowy Zheng <icenowy@...c.io>,
Hans Verkuil <hverkuil@...all.nl>,
Keiichi Watanabe <keiichiw@...omium.org>,
Jonathan Corbet <corbet@....net>,
Smitha T Murthy <smitha.t@...sung.com>,
Tom Saeger <tom.saeger@...cle.com>,
Andrzej Hajda <a.hajda@...sung.com>,
"David S . Miller" <davem@...emloft.net>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Andrew Morton <akpm@...ux-foundation.org>,
Randy Dunlap <rdunlap@...radead.org>,
Arnd Bergmann <arnd@...db.de>,
Geert Uytterhoeven <geert@...ux-m68k.org>,
Laurent Pinchart <laurent.pinchart+renesas@...asonboard.com>,
Jacob Chen <jacob-chen@...wrt.com>,
Neil Armstrong <narmstrong@...libre.com>,
Benoit Parrot <bparrot@...com>,
Todor Tomov <todor.tomov@...aro.org>,
Alexandre Courbot <acourbot@...omium.org>,
Sakari Ailus <sakari.ailus@...ux.intel.com>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Pawel Osciak <posciak@...omium.org>,
Ricardo Ribalda Delgado <ricardo.ribalda@...il.com>,
Hans de Goede <hdegoede@...hat.com>,
Sami Tolvanen <samitolvanen@...gle.com>,
Niklas Söderlund
<niklas.soderlund+renesas@...natech.se>,
linux-sunxi@...glegroups.com,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Hugues Fruchet <hugues.fruchet@...com>,
Randy Li <ayaka@...lik.info>
Subject: [PATCH v5 21/22] ARM: dts: sun8i-a33: Add Video Engine and reserved memory nodes
This adds nodes for the Video Engine and the associated reserved memory
for the A33. Up to 96 MiB of memory are dedicated to the CMA pool.
The VPU can only map the first 256 MiB of DRAM, so the reserved memory
pool has to be located in that area. Following Allwinner's decision in
downstream software, the last 96 MiB of the first 256 MiB of RAM are
reserved for this purpose.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@...tlin.com>
---
arch/arm/boot/dts/sun8i-a33.dtsi | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index 8d278ee001e9..9485e0f5750c 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -181,6 +181,21 @@
reg = <0x40000000 0x80000000>;
};
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ /* Address must be kept in the lower 256 MiBs of DRAM for VE. */
+ cma_pool: cma@...00000 {
+ compatible = "shared-dma-pool";
+ size = <0x6000000>;
+ alloc-ranges = <0x4a000000 0x6000000>;
+ reusable;
+ linux,cma-default;
+ };
+ };
+
sound: sound {
compatible = "simple-audio-card";
simple-audio-card,name = "sun8i-a33-audio";
@@ -245,6 +260,20 @@
};
};
+ vpu: video-codec@...0e000 {
+ compatible = "allwinner,sun8i-a33-video-engine";
+ reg = <0x01c0e000 0x1000>;
+
+ clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
+ <&ccu CLK_DRAM_VE>;
+ clock-names = "ahb", "mod", "ram";
+
+ resets = <&ccu RST_BUS_VE>;
+
+ interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+ allwinner,sram = <&ve_sram 1>;
+ };
+
crypto: crypto-engine@...5000 {
compatible = "allwinner,sun4i-a10-crypto";
reg = <0x01c15000 0x1000>;
--
2.17.1
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