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Message-ID: <1531226879-11802-1-git-send-email-avienamo@nvidia.com>
Date: Tue, 10 Jul 2018 15:47:53 +0300
From: Aapo Vienamo <avienamo@...dia.com>
To: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Thierry Reding <thierry.reding@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>,
Mikko Perttunen <mperttunen@...dia.com>
CC: Aapo Vienamo <avienamo@...dia.com>, <devicetree@...r.kernel.org>,
<linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: [PATCH 0/6] Tegra PMC pinctrl pad configuration
Hi all,
The Tegra Power Management Controller (PMC) can set pad power states
and voltage configuration. This series implements pinctrl interfaces
for configuring said pad properties.
Aapo Vienamo (6):
soc/tegra: pmc: Fix pad voltage configuration for Tegra186
soc/tegra: pmc: Factor out DPD register bit calculation
soc/tegra: pmc: Implement tegra_io_pad_is_powered()
soc/tegra: pmc: Use X macro to generate IO pad tables
dt-bindings: Add Tegra PMC pad configuration bindings
soc/tegra: pmc: Implement pad configuration via pinctrl
.../bindings/arm/tegra/nvidia,tegra186-pmc.txt | 84 ++++
.../bindings/arm/tegra/nvidia,tegra20-pmc.txt | 95 ++++
drivers/soc/tegra/pmc.c | 504 ++++++++++++++++-----
include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h | 18 +
include/soc/tegra/pmc.h | 1 +
5 files changed, 580 insertions(+), 122 deletions(-)
create mode 100644 include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h
--
2.7.4
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