| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20180711053122.30773-5-andrew@aj.id.au>
Date: Wed, 11 Jul 2018 15:01:22 +0930
From: Andrew Jeffery <andrew@...id.au>
To: linux-kernel@...r.kernel.org
Cc: Andrew Jeffery <andrew@...id.au>, robh+dt@...nel.org,
mark.rutland@....com, joel@....id.au, gregkh@...uxfoundation.org,
Eugene.Cho@...l.com, a.amelkin@...ro.com, stewart@...ux.ibm.com,
benh@...nel.crashing.org, openbmc@...ts.ozlabs.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: [RFC PATCH v2 4/4] dts: aspeed-g5: Describe VGA, SIO scratch and DAC mux fields
The AST2500 has VGA scratch registers that are read-only, SuperIO
scratch registers that are a mix of read-only and read-write, and a
graphics DAC mux that must be read or configured in the process of
booting e.g. an OpenPOWER system.
These capabilities do not really have a place in other drivers, so
expose them as fields via bmc-misc-ctrl.
Signed-off-by: Andrew Jeffery <andrew@...id.au>
---
Since RFC v1:
* Rework labels to what is documented in the bindings
* Fix an incorrect offset property
arch/arm/boot/dts/aspeed-g5.dtsi | 192 +++++++++++++++++++++++++++++++
1 file changed, 192 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 17f2714d18a7..c484ac637328 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -187,6 +187,77 @@
aspeed,external-nodes = <&gfx &lhc>;
};
+
+ field@...16 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0x2c>;
+ mask = <0x00030000>;
+ label = "dac-mux";
+ };
+
+ field@...0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0x50>;
+ mask = <0xffffffff>;
+ label = "vga0";
+ read-only;
+ };
+
+ field@...0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0x54>;
+ mask = <0xffffffff>;
+ label = "vga1";
+ read-only;
+ };
+
+ field@...0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0x58>;
+ mask = <0xffffffff>;
+ label = "vga2";
+ read-only;
+ };
+
+ field@...0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0x5c>;
+ mask = <0xffffffff>;
+ label = "vga3";
+ read-only;
+ };
+
+ field@...0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0x60>;
+ mask = <0xffffffff>;
+ label = "vga4";
+ read-only;
+ };
+
+ field@...0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0x64>;
+ mask = <0xffffffff>;
+ label = "vga5";
+ read-only;
+ };
+
+ field@...0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0x68>;
+ mask = <0xffffffff>;
+ label = "vga6";
+ read-only;
+ };
+
+ field@...0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0x6c>;
+ mask = <0xffffffff>;
+ label = "vga7";
+ read-only;
+ };
};
rng: hwrng@...e2078 {
@@ -343,6 +414,127 @@
#reset-cells = <1>;
};
+ field@...24 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf0>;
+ mask = <0xff000000>;
+ label = "sio2b";
+ };
+
+ field@...16 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf0>;
+ mask = <0x00ff0000>;
+ label = "sio2a";
+ };
+
+ field@...8 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf0>;
+ mask = <0x0000ff00>;
+ bit-shift = <8>;
+ label = "sio29";
+ };
+
+ field@...0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf0>;
+ mask = <0x000000ff>;
+ label = "sio28";
+ };
+
+ field@...24 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf4>;
+ mask = <0xff000000>;
+ label = "sio2f";
+ };
+
+ field@...16 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf4>;
+ mask = <0x00ff0000>;
+ label = "sio2e";
+ };
+
+ field@...8 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf4>;
+ mask = <0x0000ff00>;
+ label = "sio2d";
+ };
+
+ field@...0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf4>;
+ mask = <0x000000ff>;
+ label = "sio2c";
+ };
+
+ field@...24 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf8>;
+ mask = <0xff000000>;
+ read-only;
+ label = "sio23";
+ };
+
+ field@...16 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf8>;
+ mask = <0x00ff0000>;
+ read-only;
+ label = "sio22";
+ };
+
+ field@...8 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf8>;
+ mask = <0x0000ff00>;
+ read-only;
+ label = "sio21";
+ };
+
+ field@...0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xf8>;
+ mask = <0x000000ff>;
+ read-only;
+ label = "sio20";
+ };
+
+ field@...24 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xfc>;
+ mask = <0xff000000>;
+ read-only;
+ label = "sio27";
+ };
+
+ field@...16 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xfc>;
+ mask = <0x00ff0000>;
+ read-only;
+ label = "sio26";
+ };
+
+ field@...8 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xfc>;
+ mask = <0x0000ff00>;
+ read-only;
+ label = "sio25";
+ };
+
+ field@...0 {
+ compatible = "bmc-misc-ctrl";
+ offset = <0xfc>;
+ mask = <0x000000ff>;
+ read-only;
+ label = "sio24";
+ };
+
ibt: ibt@c0 {
compatible = "aspeed,ast2500-ibt-bmc";
reg = <0xc0 0x18>;
--
2.17.1
Powered by blists - more mailing lists