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Message-ID: <1531321615.13297.9.camel@intel.com>
Date: Wed, 11 Jul 2018 08:06:55 -0700
From: Yu-cheng Yu <yu-cheng.yu@...el.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: x86@...nel.org, "H. Peter Anvin" <hpa@...or.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, linux-kernel@...r.kernel.org,
linux-doc@...r.kernel.org, linux-mm@...ck.org,
linux-arch@...r.kernel.org, linux-api@...r.kernel.org,
Arnd Bergmann <arnd@...db.de>,
Andy Lutomirski <luto@...capital.net>,
Balbir Singh <bsingharora@...il.com>,
Cyrill Gorcunov <gorcunov@...il.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Florian Weimer <fweimer@...hat.com>,
"H.J. Lu" <hjl.tools@...il.com>, Jann Horn <jannh@...gle.com>,
Jonathan Corbet <corbet@....net>,
Kees Cook <keescook@...omiun.org>,
Mike Kravetz <mike.kravetz@...cle.com>,
Nadav Amit <nadav.amit@...il.com>,
Oleg Nesterov <oleg@...hat.com>, Pavel Machek <pavel@....cz>,
"Ravi V. Shankar" <ravi.v.shankar@...el.com>,
Vedvyas Shanbhogue <vedvyas.shanbhogue@...el.com>
Subject: Re: [RFC PATCH v2 18/27] x86/cet/shstk: Introduce WRUSS instruction
On Wed, 2018-07-11 at 11:44 +0200, Peter Zijlstra wrote:
> On Tue, Jul 10, 2018 at 03:26:30PM -0700, Yu-cheng Yu wrote:
> >
> > WRUSS is a new kernel-mode instruction but writes directly
> > to user shadow stack memory. This is used to construct
> > a return address on the shadow stack for the signal
> > handler.
> >
> > This instruction can fault if the user shadow stack is
> > invalid shadow stack memory. In that case, the kernel does
> > fixup.
> >
> >
> > +static inline int write_user_shstk_64(unsigned long addr, unsigned
> > long val)
> > +{
> > + int err = 0;
> > +
> > + asm volatile("1: wrussq %[val], (%[addr])\n"
> > + "xor %[err], %[err]\n"
> this XOR is superfluous, you already cleared @err above.
I will fix it.
>
> >
> > + "2:\n"
> > + ".section .fixup,\"ax\"\n"
> > + "3: mov $-1, %[err]; jmp 2b\n"
> > + ".previous\n"
> > + _ASM_EXTABLE(1b, 3b)
> > + : [err] "=a" (err)
> > + : [val] "S" (val), [addr] "D" (addr));
> > +
> > + return err;
> > +}
> > +#endif /* CONFIG_X86_INTEL_CET */
> > +
> > #define nop() asm volatile ("nop")
> What happened to:
>
> https://lkml.kernel.org/r/1528729376.4526.0.camel@2b52.sc.intel.com
Yes, I put that in once and realized we only need to skip the
instruction and return err. Do you think we still need a handler for
that?
Yu-cheng
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