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Message-Id: <1531479786-4911-9-git-send-email-clabbe@baylibre.com>
Date: Fri, 13 Jul 2018 11:03:05 +0000
From: Corentin Labbe <clabbe@...libre.com>
To: hdegoede@...hat.com, linux@...linux.org.uk, mark.rutland@....com,
maxime.ripard@...e-electrons.com, robh+dt@...nel.org,
tj@...nel.org, wens@...e.org
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-ide@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-sunxi@...glegroups.com, thierry.reding@...il.com,
icenowy@...c.io, Corentin Labbe <clabbe@...libre.com>
Subject: [PATCH v3 8/9] ARM: dts: sun8i: r40: add sata node
R40 have a sata controller which is the same as A20.
This patch adds a DT node for it.
Signed-off-by: Icenowy Zheng <icenowy@...c.io>
Signed-off-by: Corentin Labbe <clabbe@...libre.com>
---
arch/arm/boot/dts/sun8i-r40.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index d4ad55eb2245..bd369112a400 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -550,6 +550,22 @@
#size-cells = <0>;
};
+ ahci: sata@...8000 {
+ compatible = "allwinner,sun4i-a10-ahci";
+ reg = <0x01c18000 0x1000>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>;
+ resets = <&ccu RST_BUS_SATA>;
+ resets-name = "ahci";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sata_port0: sata-port@0 {
+ reg = <0>;
+ };
+ };
+
gmac: ethernet@...0000 {
compatible = "allwinner,sun8i-r40-gmac";
syscon = <&ccu>;
--
2.16.4
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