linux-kernel - [PATCH v2 1/2] ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config

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Message-Id: <20180713173005.19552-2-andrew.smirnov@gmail.com>
Date:   Fri, 13 Jul 2018 10:30:04 -0700
From:   Andrey Smirnov <andrew.smirnov@...il.com>
To:     Shawn Guo <shawnguo@...nel.org>
Cc:     Andrey Smirnov <andrew.smirnov@...il.com>,
        Fabio Estevam <fabio.estevam@....com>,
        Nikita Yushchenko <nikita.yoush@...entembedded.com>,
        Lucas Stach <l.stach@...gutronix.de>, cphealy@...il.com,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, Andrew Lunn <andrew@...n.ch>
Subject: [PATCH v2 1/2] ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config

Instead of relying on default values, configure PAD_AUD3_BB_CK to be a
GPIO explicitly. While at, it change the pad configuration to enable
a 100K pull-down (the pin is used as IRQ_TYPE_LEVEL_HIGH).

Cc: Fabio Estevam <fabio.estevam@....com>
Cc: Nikita Yushchenko <nikita.yoush@...entembedded.com>
Cc: Lucas Stach <l.stach@...gutronix.de>
Cc: cphealy@...il.com
Cc: Shawn Guo <shawnguo@...nel.org>
Cc: Rob Herring <robh+dt@...nel.org>
Cc: Mark Rutland <mark.rutland@....com>
Cc: linux-arm-kernel@...ts.infradead.org
Cc: devicetree@...r.kernel.org
Cc: linux-kernel@...r.kernel.org
Cc: Andrew Lunn <andrew@...n.ch>
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Signed-off-by: Andrey Smirnov <andrew.smirnov@...il.com>
---
 arch/arm/boot/dts/imx51-zii-scu3-esb.dts | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/imx51-zii-scu3-esb.dts b/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
index 2941a92d40f1..0bb42c00d72b 100644
--- a/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
+++ b/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
@@ -221,6 +221,8 @@
 			interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_switch>;
 
 			ports {
 				#address-cells = <1>;
@@ -426,6 +428,12 @@
 		>;
 	};
 
+	pinctrl_switch: switchgrp {
+		fsl,pins = <
+			MX51_PAD_AUD3_BB_CK__GPIO4_20		0xc5
+		>;
+	};
+
 	pinctrl_uart1: uart1grp {
 		fsl,pins = <
 			MX51_PAD_UART1_RXD__UART1_RXD		0x1c5
-- 
2.17.1