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Message-ID: <c6b21734b729cb5f92a5686ae3fa8469692a1302.camel@linux.intel.com>
Date: Tue, 17 Jul 2018 15:23:35 +0300
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Simon Horman <horms@...ge.net.au>,
Phil Edworthy <phil.edworthy@...esas.com>
Cc: Jarkko Nikula <jarkko.nikula@...ux.intel.com>,
Geert Uytterhoeven <geert@...ux-m68k.org>,
linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-renesas-soc@...r.kernel.org,
Mika Westerberg <mika.westerberg@...ux.intel.com>
Subject: Re: [PATCH 2/2] i2c: designware: Add support for a bus clock
On Tue, 2018-07-17 at 14:07 +0200, Simon Horman wrote:
> On Mon, Jul 16, 2018 at 09:59:13AM +0100, Phil Edworthy wrote:
> > The Synopsys I2C Controller has a bus clock, but typically SoCs hide
> > this away.
> > However, on some SoCs you need to explicity enable the bus clock in
> > order to
> > access the registers.
> > Therefore, enable an optional bus clock specified by DT.
> > + /* Optional bus clock */
> > + if (!IS_ERR(dev->busclk)) {
>
> I suspect that error values stored in dev->busclk, other than
> -ENOENT,
> should be treated as errors.
While your point sounds valid (don't remember how clk_get() is
implemented), NULL is also OK to have.
--
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Intel Finland Oy
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