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Message-ID: <20180718174745.GC20360@sirena.org.uk>
Date: Wed, 18 Jul 2018 18:47:45 +0100
From: Mark Brown <broonie@...nel.org>
To: Milan Broz <gmazyland@...il.com>
Cc: Xiongfeng Wang <wangxiongfeng2@...wei.com>, agk@...hat.com,
snitzer@...hat.com, herbert@...dor.apana.org.au,
dm-devel@...hat.com, linux-kernel@...r.kernel.org, arnd@...db.de,
jonathan.cameron@...wei.com,
Ard Biesheuvel <ard.biesheuvel@...aro.org>
Subject: Re: [PATCH 4/5] crypto: Add IV generation templates
On Wed, Jul 18, 2018 at 07:17:45PM +0200, Milan Broz wrote:
> I think the last iteration was this patch
> https://lore.kernel.org/lkml/1498106510-19793-2-git-send-email-binoy.jayan@linaro.org/
Thanks! I'd got v5 but v6 went AWOL for some reason :(
> 2) If the reason is performance, please provide numbers with the patch.
> What I see now is that the performance is almost the same. So why you are doing it?
> Any real hw that benefits from it?
The main focus was performance with accelerators, currently we can't use
ESSIV acceleration which is implemented by some hardware. Xiongfeng, we
probably need to discuss offline before sharing any actual numbers for
the hardware accelerated case since people can be sensitive about how
those are shared. Software only benchmarks are only really relevant in
showing that this won't harm existing users.
Some of the relevant systems are somewhat CPU constrained so even if the
I/O performance remains fairly consistent with the accelerators in play
it can still be a win if it frees up a useful amount of CPU for other
purposes. That'd mean CPU usage is probably interesting to benchmark
also though I don't know that the systems Xiongfeng has access to are
particularly good models there.
> I added 4k sector support in dmcrypt and IMO this helps much more than
> some hw IV accelerations (AFAIK is is already used in some mainframe
> accelerators this way because of performance).
Right, that does help too (and an out of tree variation of this was one
of the original sources of this work).
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