lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1531983117-9443-2-git-send-email-hayashibara.keiji@socionext.com>
Date:   Thu, 19 Jul 2018 15:51:56 +0900
From:   Keiji Hayashibara <hayashibara.keiji@...ionext.com>
To:     broonie@...nel.org, robh+dt@...nel.org, mark.rutland@....com,
        yamada.masahiro@...ionext.com, linux-spi@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org
Cc:     masami.hiramatsu@...aro.org, jaswinder.singh@...aro.org,
        linux-kernel@...r.kernel.org, hayashibara.keiji@...ionext.com,
        Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
Subject: [PATCH 1/2] dt-bindings: spi: add DT bindings for UniPhier SPI controller

From: Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>

Add DT bindings for SPI controller implemented in UniPhier SoCs.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
Signed-off-by: Keiji Hayashibara <hayashibara.keiji@...ionext.com>
---
 .../devicetree/bindings/spi/spi-uniphier.txt       | 26 ++++++++++++++++++++++
 1 file changed, 26 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-uniphier.txt

diff --git a/Documentation/devicetree/bindings/spi/spi-uniphier.txt b/Documentation/devicetree/bindings/spi/spi-uniphier.txt
new file mode 100644
index 0000000..9c8c4a1
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-uniphier.txt
@@ -0,0 +1,26 @@
+Socionext UniPhier SPI controller driver
+
+UniPhier SoCs have two types of SPI controllers; SCSSI supports a
+single channel, and MCSSI supports multiple channels.
+Both of them support the SPI master mode only.
+
+Required properties:
+ - compatible: should be
+	"socionext,uniphier-scssi" - for SCSSI device
+	"socionext,uniphier-mcssi" - for MCSSI device
+ - reg: address and length of the spi master registers
+ - #address-cells: must be <1>, see spi-bus.txt
+ - #size-cells: must be <0>, see spi-bus.txt
+ - clocks: A phandle to the clock for the device.
+ - resets: A phandle to the reset control for the device.
+
+Example:
+
+spi0: spi@...06000 {
+	compatible = "socionext,uniphier-scssi";
+	reg = <0x54006000 0x100>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	clocks = <&peri_clk 11>;
+	resets = <&peri_rst 11>;
+};
-- 
2.7.4

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ