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Message-Id: <20180722164936.20581-25-marcel@ziswiler.com>
Date: Sun, 22 Jul 2018 18:49:32 +0200
From: Marcel Ziswiler <marcel@...wiler.com>
To: devicetree@...r.kernel.org, linux-tegra@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Marcel Ziswiler <marcel.ziswiler@...adex.com>,
Thierry Reding <thierry.reding@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>
Subject: [PATCH 24/28] ARM: tegra: apalis_t30: enable emmc ddr52 mode
From: Marcel Ziswiler <marcel.ziswiler@...adex.com>
Add mmc-ddr-1_8v property enabling eMMC DDR52 mode.
root@...lis-t30:~# cat /sys/kernel/debug/mmc1/ios
clock: 52000000 Hz
actual clock: 52000000 Hz
vdd: 21 (3.3 ~ 3.4 V)
bus mode: 2 (push-pull)
chip select: 0 (don't care)
power mode: 2 (on)
bus width: 3 (8 bits)
timing spec: 8 (mmc DDR52)
signal voltage: 1 (1.80 V)
driver type: 0 (driver type B)
root@...lis-t30:~# hdparm -t /dev/mmcblk1
/dev/mmcblk1:
Timing buffered disk reads: 232 MB in 3.01 seconds = 77.10 MB/sec
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@...adex.com>
---
arch/arm/boot/dts/tegra30-apalis.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi
index d50fcb69dd38..5f5a287eb535 100644
--- a/arch/arm/boot/dts/tegra30-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
@@ -1080,6 +1080,7 @@
non-removable;
vmmc-supply = <®_module_3v3>; /* VCC */
vqmmc-supply = <®_1v8_vio>; /* VCCQ */
+ mmc-ddr-1_8v;
emmc: emmc@0 {
reg = <0>;
--
2.14.4
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