linux-kernel - Re: [PATCH v2 2/3] reset: imx7: Fix always writing bits as 0

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Message-ID: <1532343774.3501.8.camel@pengutronix.de>
Date:   Mon, 23 Jul 2018 13:02:54 +0200
From:   Philipp Zabel <p.zabel@...gutronix.de>
To:     Lucas Stach <l.stach@...gutronix.de>,
        Leonard Crestez <leonard.crestez@....com>,
        Richard Zhu <hongxing.zhu@....com>,
        Andrey Smirnov <andrew.smirnov@...il.com>
Cc:     Shawn Guo <shawnguo@...nel.org>,
        Joao Pinto <Joao.Pinto@...opsys.com>,
        Jingoo Han <jingoohan1@...il.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        linux-pci@...r.kernel.org, linux-pm@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Fabio Estevam <fabio.estevam@....com>,
        Dong Aisheng <aisheng.dong@....com>, kernel@...gutronix.de,
        linux-imx@....com
Subject: Re: [PATCH v2 2/3] reset: imx7: Fix always writing bits as 0

On Mon, 2018-07-23 at 11:41 +0200, Lucas Stach wrote:
> As this doesn't depend on any other patch in this series, I think it
> would be fine if Philipp takes this patch through the reset tree.
> 
> Regards,
> Lucas
> 
> Am Freitag, den 20.07.2018, 15:47 +0300 schrieb Leonard Crestez:
> > Right now the only user of reset-imx7 is pci-imx6 and the
> > reset_control_assert and deassert calls on pciephy_reset don't toggle
> > the PCIEPHY_BTN and PCIEPHY_G_RST bits as expected. Fix this by writing
> > 1 or 0 respectively.
> > 
> > The reference manual is not very clear regarding SRC_PCIEPHY_RCR but for
> > other registers like MIPIPHY and HSICPHY the bits are explicitly
> > documented as "1 means assert, 0 means deassert".
> > 
> > The values are still reversed for IMX7_RESET_PCIE_CTRL_APPS_EN.
> > 
> > > Signed-off-by: Leonard Crestez <leonard.crestez@....com>
> > > Reviewed-by: Lucas Stach <l.stach@...gutronix.de>

Thank you, applied to reset/fixes.

regards
Philipp