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Message-Id: <1532352037-7151-4-git-send-email-puwen@hygon.cn>
Date: Mon, 23 Jul 2018 21:20:23 +0800
From: Pu Wen <puwen@...on.cn>
To: tglx@...utronix.de, bp@...en8.de, thomas.lendacky@....com,
mingo@...hat.com, hpa@...or.com, peterz@...radead.org,
tony.luck@...el.com, pbonzini@...hat.com, rkrcmar@...hat.com,
boris.ostrovsky@...cle.com, jgross@...e.com, rjw@...ysocki.net,
lenb@...nel.org, viresh.kumar@...aro.org, mchehab@...nel.org,
trenn@...e.com, shuah@...nel.org, JBeulich@...e.com, x86@...nel.org
Cc: linux-kernel@...r.kernel.org, linux-arch@...r.kernel.org,
kvm@...r.kernel.org, xen-devel@...ts.xenproject.org
Subject: [PATCH v2 03/17] x86/mtrr: get MTRR number and support TOP_MEM2
Hygon CPU have a special magic MSR way to force WB for memory >4GB,
and also support TOP_MEM2. Therefore, it is necessary to add Hygon
support in amd_special_default_mtrr().
The MtrrFixDramModEn bit on Hygon platform should also be set to 1 during
BIOS initialization of the fixed MTRRs, then cleared to 0 for operation.
The number of variable MTRRs for Hygon is 2 as AMD's.
Signed-off-by: Pu Wen <puwen@...on.cn>
---
arch/x86/kernel/cpu/mtrr/cleanup.c | 3 ++-
arch/x86/kernel/cpu/mtrr/generic.c | 3 ++-
arch/x86/kernel/cpu/mtrr/mtrr.c | 2 +-
3 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kernel/cpu/mtrr/cleanup.c b/arch/x86/kernel/cpu/mtrr/cleanup.c
index 765afd5..3668c5d 100644
--- a/arch/x86/kernel/cpu/mtrr/cleanup.c
+++ b/arch/x86/kernel/cpu/mtrr/cleanup.c
@@ -831,7 +831,8 @@ int __init amd_special_default_mtrr(void)
{
u32 l, h;
- if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
+ if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
+ boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)
return 0;
if (boot_cpu_data.x86 < 0xf)
return 0;
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
index e12ee86..71f868f 100644
--- a/arch/x86/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
@@ -49,7 +49,8 @@ static inline void k8_check_syscfg_dram_mod_en(void)
{
u32 lo, hi;
- if (!((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) &&
+ if (!((boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+ boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) &&
(boot_cpu_data.x86 >= 0x0f)))
return;
diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.c b/arch/x86/kernel/cpu/mtrr/mtrr.c
index 9a19c80..507039c 100644
--- a/arch/x86/kernel/cpu/mtrr/mtrr.c
+++ b/arch/x86/kernel/cpu/mtrr/mtrr.c
@@ -127,7 +127,7 @@ static void __init set_num_var_ranges(void)
if (use_intel())
rdmsr(MSR_MTRRcap, config, dummy);
- else if (is_cpu(AMD))
+ else if (is_cpu(AMD) || is_cpu(HYGON))
config = 2;
else if (is_cpu(CYRIX) || is_cpu(CENTAUR))
config = 8;
--
2.7.4
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