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Message-ID: <153256098433.48062.7081577175619627994@swboyd.mtv.corp.google.com>
Date: Wed, 25 Jul 2018 16:23:04 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Masahiro Yamada <yamada.masahiro@...ionext.com>,
Stephen Boyd <sboyd@...eaurora.org>, linux-clk@...r.kernel.org
Cc: Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>,
Masahiro Yamada <yamada.masahiro@...ionext.com>,
Michael Turquette <mturquette@...libre.com>,
linux-kernel@...r.kernel.org,
Jassi Brar <jaswinder.singh@...aro.org>,
Masami Hiramatsu <mhiramat@...nel.org>,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 1/2] clk: uniphier: add NAND 200MHz clock
Quoting Masahiro Yamada (2018-07-20 01:37:35)
> The Denali NAND controller IP needs three clocks:
>
> - clk: controller core clock
>
> - clk_x: bus interface clock
>
> - ecc_clk: clock at which ECC circuitry is run
>
> Currently, only the first one (50MHz) is provided. The rest of the
> two clock ports must be connected to the 200MHz clock line. Add this.
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@...ionext.com>
> ---
Applied to clk-next
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